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00016 #include <memory.h>
00017 #include <string.h>
00018
00019 #include "cvt_board_commons.h"
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00044
00046 BOOL cvt_board_open( cvt_board_data* p_data, UINT16 base_address, long vme_handle, const cvt_reg_table *p_reg_table)
00047 {
00048 memset( p_data, 0, sizeof( cvt_board_data));
00049
00050
00051 p_data->m_base_address= base_address;
00052 p_data->m_vme_handle= vme_handle;
00053 p_data->m_p_reg_table= p_reg_table;
00054
00055 return TRUE;
00056 }
00058
00060 BOOL cvt_board_close( cvt_board_data* p_data)
00061 {
00062 return TRUE;
00063 }
00064
00066
00067
00068
00070
00072
00074 BOOL cvt_write( cvt_board_data* p_data, UINT16 address, const void* p_value, CVAddressModifier am, CVDataWidth data_size)
00075 {
00076 CVErrorCodes err_code;
00077 if( ( err_code= CAENVME_WriteCycle( p_data->m_vme_handle, (((UINT32)p_data->m_base_address)<< 16)| address, (void*)p_value, am, data_size))!= cvSuccess)
00078 {
00079 TRACE( "CAENVME_WriteCycle: ");
00080 TRACE( CAENVME_DecodeError( err_code));
00081 TRACE( "\n");
00082 return FALSE;
00083 }
00084 return TRUE;
00085 }
00086
00088
00090 BOOL cvt_read( cvt_board_data* p_data, UINT16 address, void* p_value, CVAddressModifier am, CVDataWidth data_size)
00091 {
00092 CVErrorCodes err_code;
00093 if( ( err_code= CAENVME_ReadCycle( p_data->m_vme_handle, (((UINT32)p_data->m_base_address)<< 16)| address, (void*)p_value, am, data_size))!= cvSuccess)
00094 {
00095 TRACE( "CAENVME_ReadCycle: ");
00096 TRACE( CAENVME_DecodeError( err_code));
00097 TRACE( "\n");
00098 return FALSE;
00099 }
00100 return TRUE;
00101 }
00102
00104
00106 BOOL cvt_set_bitmask( cvt_board_data* p_data, UINT16 address, void *p_value, CVAddressModifier am, CVDataWidth data_size)
00107 {
00108 switch( data_size)
00109 {
00110 case cvD8:
00111 {
00112 UINT8 reg_value= 0;
00113 if( !cvt_read( p_data, address, ®_value, am, data_size))
00114 return FALSE;
00115 reg_value|= *(UINT8*)p_value;
00116 if( !cvt_write( p_data, address, ®_value, am, data_size))
00117 return FALSE;
00118 }
00119 break;
00120 case cvD16:
00121 case cvD16_swapped:
00122 {
00123 UINT16 reg_value= 0;
00124 if( !cvt_read( p_data, address, ®_value, am, data_size))
00125 return FALSE;
00126 reg_value|= *(UINT16*)p_value;
00127 if( !cvt_write( p_data, address, ®_value, am, data_size))
00128 return FALSE;
00129 }
00130 break;
00131 case cvD32:
00132 case cvD32_swapped:
00133 {
00134 UINT32 reg_value= 0;
00135 if( !cvt_read( p_data, address, ®_value, am, data_size))
00136 return FALSE;
00137 reg_value|= *(UINT32*)p_value;
00138 if( !cvt_write( p_data, address, ®_value, am, data_size))
00139 return FALSE;
00140 }
00141 break;
00142 default:
00143 return FALSE;
00144 }
00145
00146 return TRUE;
00147 }
00148
00150
00152 BOOL cvt_clear_bitmask( cvt_board_data* p_data, UINT16 address, void* p_value, CVAddressModifier am, CVDataWidth data_size)
00153 {
00154 switch( data_size)
00155 {
00156 case cvD8:
00157 {
00158 UINT8 reg_value= 0;
00159 if( !cvt_read( p_data, address, ®_value, am, data_size))
00160 return FALSE;
00161 reg_value&= ~*(UINT8*)p_value;
00162 if( !cvt_write( p_data, address, ®_value, am, data_size))
00163 return FALSE;
00164 }
00165 break;
00166 case cvD16:
00167 case cvD16_swapped:
00168 {
00169 UINT16 reg_value= 0;
00170 if( !cvt_read( p_data, address, ®_value, am, data_size))
00171 return FALSE;
00172 reg_value&= ~*(UINT16*)p_value;
00173 if( !cvt_write( p_data, address, ®_value, am, data_size))
00174 return FALSE;
00175 }
00176 break;
00177 case cvD32:
00178 case cvD32_swapped:
00179 {
00180 UINT32 reg_value= 0;
00181 if( !cvt_read( p_data, address, ®_value, am, data_size))
00182 return FALSE;
00183 reg_value&= ~*(UINT32*)p_value;
00184 if( !cvt_write( p_data, address, ®_value, am, data_size))
00185 return FALSE;
00186 }
00187 break;
00188 default:
00189 return FALSE;
00190 }
00191
00192 return TRUE;
00193 }
00194
00196
00198 BOOL cvt_FIFO_BLT_read( cvt_board_data* p_data, UINT16 address, void* p_buffer, UINT32 buffer_size, UINT32 *p_read_bytes, CVAddressModifier am, CVDataWidth data_size)
00199 {
00200 CVErrorCodes err_code= CAENVME_FIFOBLTReadCycle( p_data->m_vme_handle, (((UINT32)p_data->m_base_address)<< 16)| address, (void*)p_buffer, buffer_size, am, data_size, p_read_bytes);
00201 switch( err_code)
00202 {
00203 case cvSuccess:
00204 case cvBusError:
00205 break;
00206 default:
00207 TRACE( "CAENVME_FIFOBLTReadCycle: ");
00208 TRACE( CAENVME_DecodeError( err_code));
00209 TRACE( "\n");
00210 return FALSE;
00211 }
00212 return TRUE;
00213 }
00214
00216
00218 BOOL cvt_write_reg( cvt_board_data* p_data, UINT16 reg_index, const void* p_value)
00219 {
00220 return cvt_write( p_data, p_data->m_p_reg_table[ reg_index].m_address, p_value, p_data->m_p_reg_table[ reg_index].m_am, p_data->m_p_reg_table[ reg_index].m_data_size);
00221 }
00222
00224
00226 BOOL cvt_read_reg( cvt_board_data* p_data, UINT16 reg_index, void* p_value)
00227 {
00228 return cvt_read( p_data, p_data->m_p_reg_table[ reg_index].m_address, p_value, p_data->m_p_reg_table[ reg_index].m_am, p_data->m_p_reg_table[ reg_index].m_data_size);
00229 }
00230
00232
00234 BOOL cvt_set_bitmask_reg( cvt_board_data* p_data, UINT16 reg_index, void *p_value)
00235 {
00236 return cvt_set_bitmask( p_data, p_data->m_p_reg_table[ reg_index].m_address, p_value, p_data->m_p_reg_table[ reg_index].m_am, p_data->m_p_reg_table[ reg_index].m_data_size);
00237 }
00238
00240
00242 BOOL cvt_clear_bitmask_reg( cvt_board_data* p_data, UINT16 reg_index, void* p_value)
00243 {
00244 return cvt_clear_bitmask( p_data, p_data->m_p_reg_table[ reg_index].m_address, p_value, p_data->m_p_reg_table[ reg_index].m_am, p_data->m_p_reg_table[ reg_index].m_data_size);
00245 }
00246
00248
00250 BOOL cvt_FIFO_BLT_read_reg( cvt_board_data* p_data, UINT16 reg_index, void* p_buffer, UINT32 buffer_size, UINT32 *p_read_bytes)
00251 {
00252 return cvt_FIFO_BLT_read( p_data, p_data->m_p_reg_table[ reg_index].m_address, p_buffer, buffer_size, p_read_bytes, p_data->m_p_reg_table[ reg_index].m_am, p_data->m_p_reg_table[ reg_index].m_data_size);
00253 }
00254
00256
00257
00258
00260
00262
00264 BOOL cvt_set_MCST_CBLT( UINT8 address, cvt_board_data** board_array, UINT16 board_array_len)
00265 {
00266 MCST_CBLT_board_pos pos= MCST_CBLT_board_pos_last;
00267 while( board_array_len--)
00268 {
00269 if( !board_array[ board_array_len]->set_MCST_CBLT)
00270 {
00271 TRACE1("cvt_set_MCST_CBLT: no set_MCST_CBLT method setted for board 0x%08p\n", board_array[ board_array_len]);
00272 return FALSE;
00273 }
00274 if( !(board_array[ board_array_len]->set_MCST_CBLT)( board_array[ board_array_len], address, pos))
00275 {
00276 TRACE1("cvt_set_MCST_CBLT: set_MCST_CBLT method failure for board 0x%08p\n", board_array[ board_array_len]);
00277 return FALSE;
00278 }
00279 pos= ( board_array_len- 1)? MCST_CBLT_board_pos_mid: MCST_CBLT_board_pos_first;
00280 }
00281 return TRUE;
00282 }
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00288
00290
00292 const char* cvt_SW_rev( void)
00293 {
00294 return "1.1";
00295 }