cvt_V1190.h

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00001 
00002 
00010 
00011 #ifndef __CVT_V1190_DEF_H
00012 #define __CVT_V1190_DEF_H
00013 
00015 // File includes
00017 #include "cvt_common_defs.h"
00018 #include "cvt_board_commons.h"
00020 // Global defines
00022 
00024 
00029 
00030 #define CVT_V1190_USE_DATA_QUEUE        1
00031 
00033 
00038 
00039 #define CVT_V1190_QUEUE_SIZE_DWORD      (1024*1024)     
00040 
00042 
00047 
00048 typedef enum
00049 {
00050         CVT_V1190_TYPE_A,                                                       
00051         CVT_V1190_TYPE_B,                                                       
00052 } CVT_V1190_TYPES;
00053 
00055 
00061 
00062 typedef struct
00063 {
00064         cvt_board_data  m_common_data;                          
00065         //
00066         // Board specific data
00067         CVT_V1190_TYPES m_type;                                         
00068 #ifdef CVT_V1190_USE_DATA_QUEUE
00069         UINT32 *m_queue;                                                        
00070         long m_queue_ini;                                                       
00071         long m_queue_end;                                                       
00072 #endif
00073         // TODO: add other variables here
00074 } cvt_V1190_data;
00075 
00076 
00077 #define CVT_V1190_NUM_TDC_A             4                               
00078 #define CVT_V1190_NUM_TDC_B             2                               
00080 
00081 // Registers address
00082 
00083 #define CVT_V1190_OUT_BUFFER_ADD                                0x0000                  
00084 #define CVT_V1190_CONTROL_ADD                                   0x1000                  
00085 #define CVT_V1190_STATUS_ADD                                    0x1002                  
00086 #define CVT_V1190_INT_LEVEL_ADD                                 0x100A                  
00087 #define CVT_V1190_INT_VECTOR_ADD                                0x100C                  
00088 #define CVT_V1190_GEO_ADDRESS_ADD                               0x100E                  
00089 #define CVT_V1190_MCST_CBLT_ADDRESS_ADD                 0x1010                  
00090 #define CVT_V1190_MCST_CBLT_CTRL_ADD                    0x1012                  
00091 #define CVT_V1190_MOD_RESET_ADD                                 0x1014                  
00092 #define CVT_V1190_SW_CLEAR_ADD                                  0x1016                  
00093 #define CVT_V1190_SW_EVENT_RESET_ADD                    0x1018                  
00094 #define CVT_V1190_SW_TRIGGER_ADD                                0x101A                  
00095 #define CVT_V1190_EVENT_COUNTER_ADD                             0x101C                  
00096 #define CVT_V1190_EVENT_STORED_ADD                              0x1020                  
00097 #define CVT_V1190_ALMOST_FULL_LVL_ADD                   0x1022                  
00098 #define CVT_V1190_BLT_EVENT_NUM_ADD                             0x1024                  
00099 #define CVT_V1190_FW_REV_ADD                                    0x1026                  
00100 #define CVT_V1190_TESTREG_ADD                                   0x1028                  
00101 #define CVT_V1190_OUT_PROG_CTRL_ADD                             0x102C                  
00102 #define CVT_V1190_MICRO_ADD                                             0x102E                  
00103 #define CVT_V1190_MICRO_HND_ADD                                 0x1030                  
00104 #define CVT_V1190_SEL_FLASH_ADD                                 0x1032                  
00105 #define CVT_V1190_FLASH_ADD                                             0x1034                  
00106 #define CVT_V1190_COMP_SRAM_PAGE_ADD                    0x1036                  
00107 #define CVT_V1190_EVENT_FIFO_ADD                                0x1038                  
00108 #define CVT_V1190_EVENT_FIFO_STORED_ADD                 0x103C                  
00109 #define CVT_V1190_EVENT_FIFO_STATUS_ADD                 0x103E                  
00110 #define CVT_V1190_DUMMY32_ADD                                   0x1200                  
00111 #define CVT_V1190_DUMMY16_ADD                                   0x1204                  
00112 #define CVT_V1190_ROM_OUI_MSB_ADD                               0x4024                  
00113 #define CVT_V1190_ROM_OUI_ADD                                   0x4028                  
00114 #define CVT_V1190_ROM_OUI_LSB_ADD                               0x402C                  
00115 #define CVT_V1190_ROM_VERSION_ADD                               0x4030                  
00116 #define CVT_V1190_ROM_BOARD_ID_MSB_ADD                  0x4034                  
00117 #define CVT_V1190_ROM_BOARD_ID_ADD                              0x4038                  
00118 #define CVT_V1190_ROM_BOARD_ID_LSB_ADD                  0x403C                  
00119 #define CVT_V1190_ROM_REVISION_3_ADD                    0x4040                  
00120 #define CVT_V1190_ROM_REVISION_2_ADD                    0x4044                  
00121 #define CVT_V1190_ROM_REVISION_1_ADD                    0x4048                  
00122 #define CVT_V1190_ROM_REVISION_0_ADD                    0x404C                  
00123 #define CVT_V1190_ROM_SERIAL_MSB_ADD                    0x4080                  
00124 #define CVT_V1190_ROM_SERIAL_LSB_ADD                    0x4084                  
00126 
00127 // Registers data size
00128 
00129 #define CVT_V1190_OUT_BUFFER_DATA_SIZE                  cvD64                   
00130 #define CVT_V1190_CONTROL_DATA_SIZE                             cvD16                   
00131 #define CVT_V1190_STATUS_DATA_SIZE                              cvD16                   
00132 #define CVT_V1190_INT_LEVEL_DATA_SIZE                   cvD16                   
00133 #define CVT_V1190_INT_VECTOR_DATA_SIZE                  cvD16                   
00134 #define CVT_V1190_GEO_ADDRESS_DATA_SIZE                 cvD16                   
00135 #define CVT_V1190_MCST_CBLT_ADDRESS_DATA_SIZE   cvD16                   
00136 #define CVT_V1190_MCST_CBLT_CTRL_DATA_SIZE              cvD16                   
00137 #define CVT_V1190_MOD_RESET_DATA_SIZE                   cvD16                   
00138 #define CVT_V1190_SW_CLEAR_DATA_SIZE                    cvD16                   
00139 #define CVT_V1190_SW_EVENT_RESET_DATA_SIZE              cvD16                   
00140 #define CVT_V1190_SW_TRIGGER_DATA_SIZE                  cvD16                   
00141 #define CVT_V1190_EVENT_COUNTER_DATA_SIZE               cvD32                   
00142 #define CVT_V1190_EVENT_STORED_DATA_SIZE                cvD16                   
00143 #define CVT_V1190_ALMOST_FULL_LVL_DATA_SIZE             cvD16                   
00144 #define CVT_V1190_BLT_EVENT_NUM_DATA_SIZE               cvD16                   
00145 #define CVT_V1190_FW_REV_DATA_SIZE                              cvD16                   
00146 #define CVT_V1190_TESTREG_DATA_SIZE                             cvD32                   
00147 #define CVT_V1190_OUT_PROG_CTRL_DATA_SIZE               cvD16                   
00148 #define CVT_V1190_MICRO_DATA_SIZE                               cvD16                   
00149 #define CVT_V1190_MICRO_HND_DATA_SIZE                   cvD16                   
00150 #define CVT_V1190_SEL_FLASH_DATA_SIZE                   cvD16                   
00151 #define CVT_V1190_FLASH_DATA_SIZE                               cvD16                   
00152 #define CVT_V1190_COMP_SRAM_PAGE_DATA_SIZE              cvD16                   
00153 #define CVT_V1190_EVENT_FIFO_DATA_SIZE                  cvD32                   
00154 #define CVT_V1190_EVENT_FIFO_STORED_DATA_SIZE   cvD16                   
00155 #define CVT_V1190_EVENT_FIFO_STATUS_DATA_SIZE   cvD16                   
00156 #define CVT_V1190_DUMMY32_DATA_SIZE                             cvD32                   
00157 #define CVT_V1190_DUMMY16_DATA_SIZE                             cvD16                   
00158 #define CVT_V1190_ROM_OUI_MSB_DATA_SIZE                 cvD16                   
00159 #define CVT_V1190_ROM_OUI_DATA_SIZE                             cvD16                   
00160 #define CVT_V1190_ROM_OUI_LSB_DATA_SIZE                 cvD16                   
00161 #define CVT_V1190_ROM_VERSION_DATA_SIZE                 cvD16                   
00162 #define CVT_V1190_ROM_BOARD_ID_MSB_DATA_SIZE    cvD16                   
00163 #define CVT_V1190_ROM_BOARD_ID_DATA_SIZE                cvD16                   
00164 #define CVT_V1190_ROM_BOARD_ID_LSB_DATA_SIZE    cvD16                   
00165 #define CVT_V1190_ROM_REVISION_3_DATA_SIZE              cvD16                   
00166 #define CVT_V1190_ROM_REVISION_2_DATA_SIZE              cvD16                   
00167 #define CVT_V1190_ROM_REVISION_1_DATA_SIZE              cvD16                   
00168 #define CVT_V1190_ROM_REVISION_0_DATA_SIZE              cvD16                   
00169 #define CVT_V1190_ROM_SERIAL_MSB_DATA_SIZE              cvD16                   
00170 #define CVT_V1190_ROM_SERIAL_LSB_DATA_SIZE              cvD16                   
00172 
00173 // Registers address modifiers
00174 
00175 #define CVT_V1190_OUT_BUFFER_AM                                 cvA32_S_MBLT    
00176 #define CVT_V1190_CONTROL_AM                                    cvA32_S_DATA    
00177 #define CVT_V1190_STATUS_AM                                             cvA32_S_DATA    
00178 #define CVT_V1190_INT_LEVEL_AM                                  cvA32_S_DATA    
00179 #define CVT_V1190_INT_VECTOR_AM                                 cvA32_S_DATA    
00180 #define CVT_V1190_GEO_ADDRESS_AM                                cvA32_S_DATA    
00181 #define CVT_V1190_MCST_CBLT_ADDRESS_AM                  cvA32_S_DATA    
00182 #define CVT_V1190_MCST_CBLT_CTRL_AM                             cvA32_S_DATA    
00183 #define CVT_V1190_MOD_RESET_AM                                  cvA32_S_DATA    
00184 #define CVT_V1190_SW_CLEAR_AM                                   cvA32_S_DATA    
00185 #define CVT_V1190_SW_EVENT_RESET_AM                             cvA32_S_DATA    
00186 #define CVT_V1190_SW_TRIGGER_AM                                 cvA32_S_DATA    
00187 #define CVT_V1190_EVENT_COUNTER_AM                              cvA32_S_DATA    
00188 #define CVT_V1190_EVENT_STORED_AM                               cvA32_S_DATA    
00189 #define CVT_V1190_ALMOST_FULL_LVL_AM                    cvA32_S_DATA    
00190 #define CVT_V1190_BLT_EVENT_NUM_AM                              cvA32_S_DATA    
00191 #define CVT_V1190_FW_REV_AM                                             cvA32_S_DATA    
00192 #define CVT_V1190_TESTREG_AM                                    cvA32_S_DATA    
00193 #define CVT_V1190_OUT_PROG_CTRL_AM                              cvA32_S_DATA    
00194 #define CVT_V1190_MICRO_AM                                              cvA32_S_DATA    
00195 #define CVT_V1190_MICRO_HND_AM                                  cvA32_S_DATA    
00196 #define CVT_V1190_SEL_FLASH_AM                                  cvA32_S_DATA    
00197 #define CVT_V1190_FLASH_AM                                              cvA32_S_DATA    
00198 #define CVT_V1190_COMP_SRAM_PAGE_AM                             cvA32_S_DATA    
00199 #define CVT_V1190_EVENT_FIFO_AM                                 cvA32_S_DATA    
00200 #define CVT_V1190_EVENT_FIFO_STORED_AM                  cvA32_S_DATA    
00201 #define CVT_V1190_EVENT_FIFO_STATUS_AM                  cvA32_S_DATA    
00202 #define CVT_V1190_DUMMY32_AM                                    cvA32_S_DATA    
00203 #define CVT_V1190_DUMMY16_AM                                    cvA32_S_DATA    
00204 #define CVT_V1190_ROM_OUI_MSB_AM                                cvA32_S_DATA    
00205 #define CVT_V1190_ROM_OUI_AM                                    cvA32_S_DATA    
00206 #define CVT_V1190_ROM_OUI_LSB_AM                                cvA32_S_DATA    
00207 #define CVT_V1190_ROM_VERSION_AM                                cvA32_S_DATA    
00208 #define CVT_V1190_ROM_BOARD_ID_MSB_AM                   cvA32_S_DATA    
00209 #define CVT_V1190_ROM_BOARD_ID_AM                               cvA32_S_DATA    
00210 #define CVT_V1190_ROM_BOARD_ID_LSB_AM                   cvA32_S_DATA    
00211 #define CVT_V1190_ROM_REVISION_3_AM                             cvA32_S_DATA    
00212 #define CVT_V1190_ROM_REVISION_2_AM                             cvA32_S_DATA    
00213 #define CVT_V1190_ROM_REVISION_1_AM                             cvA32_S_DATA    
00214 #define CVT_V1190_ROM_REVISION_0_AM                             cvA32_S_DATA    
00215 #define CVT_V1190_ROM_SERIAL_MSB_AM                             cvA32_S_DATA    
00216 #define CVT_V1190_ROM_SERIAL_LSB_AM                             cvA32_S_DATA    
00218 #define CVT_V1190_MAX_CHANNEL_N                                 128                             
00220 
00221 
00226 
00227 typedef enum
00228 {
00229         CVT_V1190_OUT_BUFFER_INDEX,                                     
00230         CVT_V1190_CONTROL_INDEX,                                        
00231         CVT_V1190_STATUS_INDEX,                                         
00232         CVT_V1190_INT_LEVEL_INDEX,                                      
00233         CVT_V1190_INT_VECTOR_INDEX,                                     
00234         CVT_V1190_GEO_ADDRESS_INDEX,                            
00235         CVT_V1190_MCST_CBLT_ADDRESS_INDEX,                      
00236         CVT_V1190_MCST_CBLT_CTRL_INDEX,                         
00237         CVT_V1190_MOD_RESET_INDEX,                                      
00238         CVT_V1190_SW_CLEAR_INDEX,                                       
00239         CVT_V1190_SW_EVENT_RESET_INDEX,                         
00240         CVT_V1190_SW_TRIGGER_INDEX,                                     
00241         CVT_V1190_EVENT_COUNTER_INDEX,                          
00242         CVT_V1190_EVENT_STORED_INDEX,                           
00243         CVT_V1190_ALMOST_FULL_LVL_INDEX,                        
00244         CVT_V1190_BLT_EVENT_NUM_INDEX,                          
00245         CVT_V1190_FW_REV_INDEX,                                         
00246         CVT_V1190_TESTREG_INDEX,                                        
00247         CVT_V1190_OUT_PROG_CTRL_INDEX,                          
00248         CVT_V1190_MICRO_INDEX,                                          
00249         CVT_V1190_MICRO_HND_INDEX,                                      
00250         CVT_V1190_SEL_FLASH_INDEX,                                      
00251         CVT_V1190_FLASH_INDEX,                                          
00252         CVT_V1190_COMP_SRAM_PAGE_INDEX,                         
00253         CVT_V1190_EVENT_FIFO_INDEX,                                     
00254         CVT_V1190_EVENT_FIFO_STORED_INDEX,                      
00255         CVT_V1190_EVENT_FIFO_STATUS_INDEX,                      
00256         CVT_V1190_DUMMY32_INDEX,                                        
00257         CVT_V1190_DUMMY16_INDEX,                                        
00258         CVT_V1190_ROM_OUI_MSB_INDEX,                            
00259         CVT_V1190_ROM_OUI_INDEX,                                        
00260         CVT_V1190_ROM_OUI_LSB_INDEX,                            
00261         CVT_V1190_ROM_VERSION_INDEX,                            
00262         CVT_V1190_ROM_BOARD_ID_MSB_INDEX,                       
00263         CVT_V1190_ROM_BOARD_ID_INDEX,                           
00264         CVT_V1190_ROM_BOARD_ID_LSB_INDEX,                       
00265         CVT_V1190_ROM_REVISION_3_INDEX,                         
00266         CVT_V1190_ROM_REVISION_2_INDEX,                         
00267         CVT_V1190_ROM_REVISION_1_INDEX,                         
00268         CVT_V1190_ROM_REVISION_0_INDEX,                         
00269         CVT_V1190_ROM_SERIAL_MSB_INDEX,                         
00270         CVT_V1190_ROM_SERIAL_LSB_INDEX,                         
00271 } CVT_V1190_REG_INDEX;
00272 
00274 // Micro register opcodes
00276 
00278 
00281 
00282 typedef enum
00283 {
00285         // Micro register opcodes: ACQUISITION MODE
00287         CVT_V1190_TRG_MATCH_OPCODE                                      = 0x0000,               
00288         CVT_V1190_CONT_STORE_OPCODE                                     = 0x0100,               
00289         CVT_V1190_READ_ACQ_MOD_OPCODE                           = 0x0200,               
00290         CVT_V1190_SET_KEEP_TOKEN_OPCODE                         = 0x0300,               
00291         CVT_V1190_CLEAR_KEEP_TOKEN_OPCODE                       = 0x0400,               
00292         CVT_V1190_LOAD_DEF_CONFIG_OPCODE                        = 0x0500,               
00293         CVT_V1190_SAVE_USER_CONFIG_OPCODE                       = 0x0600,               
00294         CVT_V1190_LOAD_USER_CONFIG_OPCODE                       = 0x0700,               
00295         CVT_V1190_AUTOLOAD_USER_CONFIG_OPCODE           = 0x0800,               
00296         CVT_V1190_AUTOLOAD_DEF_CONFIG_OPCODE            = 0x0900,               
00298 
00299         // Micro register opcodes: TRIGGER
00301         CVT_V1190_SET_WIN_WIDTH_OPCODE                          = 0x1000,               
00302         CVT_V1190_SET_WIN_OFFSET_OPCODE                         = 0x1100,               
00303         CVT_V1190_SET_SW_MARGIN_OPCODE                          = 0x1200,               
00304         CVT_V1190_SET_REJ_MARGIN_OPCODE                         = 0x1300,               
00305         CVT_V1190_EN_SUB_TRG_OPCODE                                     = 0x1400,               
00306         CVT_V1190_DIS_SUB_TRG_OPCODE                            = 0x1500,               
00307         CVT_V1190_READ_TRG_CONF_OPCODE                          = 0x1600,               
00309 
00310         // Micro register opcodes: TDC EDGE DETECTION & RESOLUTION
00312         CVT_V1190_SET_DETECTION_OPCODE                          = 0x2200,               
00313         CVT_V1190_READ_DETECTION_OPCODE                         = 0x2300,               
00314         CVT_V1190_SET_TR_LEAD_LSB_OPCODE                        = 0x2400,               
00315         CVT_V1190_SET_PAIR_RES_OPCODE                           = 0x2500,               
00316         CVT_V1190_READ_RES_OPCODE                                       = 0x2600,               
00317         CVT_V1190_SET_DEAD_TIME_OPCODE                          = 0x2800,               
00318         CVT_V1190_READ_DEAD_TIME_OPCODE                         = 0x2900,               
00320 
00321         // Micro register opcodes: TDC READOUT
00323         CVT_V1190_EN_HEAD_TRAILER_OPCODE                        = 0x3000,               
00324         CVT_V1190_DIS_HEAD_TRAILER_OPCODE                       = 0x3100,               
00325         CVT_V1190_READ_HEAD_TRAILER_OPCODE                      = 0x3200,               
00326         CVT_V1190_SET_EVENT_SIZE_OPCODE                         = 0x3300,               
00327         CVT_V1190_READ_EVENT_SIZE_OPCODE                        = 0x3400,               
00328         CVT_V1190_EN_ERROR_MARK_OPCODE                          = 0x3500,               
00329         CVT_V1190_DIS_ERROR_MARK_OPCODE                         = 0x3600,               
00330         CVT_V1190_EN_ERROR_BYPASS_OPCODE                        = 0x3700,               
00331         CVT_V1190_DIS_ERROR_BYPASS_OPCODE                       = 0x3800,               
00332         CVT_V1190_SET_ERROR_TYPES_OPCODE                        = 0x3900,               
00333         CVT_V1190_READ_ERROR_TYPES_OPCODE                       = 0x3A00,               
00334         CVT_V1190_SET_FIFO_SIZE_OPCODE                          = 0x3B00,               
00335         CVT_V1190_READ_FIFO_SIZE_OPCODE                         = 0x3C00,               
00337 
00338         // Micro register opcodes: CHANNEL ENABLE
00340         CVT_V1190_EN_CHANNEL_OPCODE                                     = 0x4000,               
00341         CVT_V1190_DIS_CHANNEL_OPCODE                            = 0x4100,               
00342         CVT_V1190_EN_ALL_CH_OPCODE                                      = 0x4200,               
00343         CVT_V1190_DIS_ALL_CH_OPCODE                                     = 0x4300,               
00344         CVT_V1190_WRITE_EN_PATTERN_OPCODE                       = 0x4400,               
00345         CVT_V1190_READ_EN_PATTERN_OPCODE                        = 0x4500,               
00346         CVT_V1190_WRITE_EN_PATTERN32_OPCODE                     = 0x4600,               
00347         CVT_V1190_READ_EN_PATTERN32_OPCODE                      = 0x4700,               
00349 
00350         // Micro register opcodes: ADJUST
00352         CVT_V1190_SET_GLOB_OFFSET_OPCODE                        = 0x5000,               
00353         CVT_V1190_READ_GLOB_OFFSET_OPCODE                       = 0x5100,               
00354         CVT_V1190_SET_ADJUST_CH_OPCODE                          = 0x5200,               
00355         CVT_V1190_READ_ADJUST_CH_OPCODE                         = 0x5300,               
00356         CVT_V1190_SET_RC_ADJ_OPCODE                                     = 0x5400,               
00357         CVT_V1190_READ_RC_ADJ_OPCODE                            = 0x5500,               
00358         CVT_V1190_SAVE_RC_ADJ_OPCODE                            = 0x5600,               
00360 
00361         // Micro register opcodes: MISCELLANEOUS
00363         CVT_V1190_READ_TDC_ID_OPCODE                            = 0x6000,               
00364         CVT_V1190_READ_MICRO_REV_OPCODE                         = 0x6100,               
00365         CVT_V1190_RESET_DLL_PLL_OPCODE                          = 0x6200,               
00367 
00368         // Micro register opcodes: ADVANCED
00370         CVT_V1190_WRITE_SETUP_REG_OPCODE                        = 0x7000,               
00371         CVT_V1190_READ_SETUP_REG_OPCODE                         = 0x7100,               
00372         CVT_V1190_UPDATE_SETUP_REG_OPCODE                       = 0x7200,               
00373         CVT_V1190_DEFAULT_SETUP_REG_OPCODE                      = 0x7300,               
00374         CVT_V1190_READ_ERROR_STATUS_OPCODE                      = 0x7400,               
00375         CVT_V1190_READ_DLL_LOCK_OPCODE                          = 0x7500,               
00376         CVT_V1190_READ_STATUS_STREAM_OPCODE                     = 0x7600,               
00377         CVT_V1190_UPDATE_SETUP_TDC_OPCODE                       = 0x7700,               
00379 
00380         // Micro register opcodes: DEBUG AND TEST
00382         CVT_V1190_WRITE_EEPROM_OPCODE                           = 0xC000,               
00383         CVT_V1190_READ_EEPROM_OPCODE                            = 0xC100,               
00384         CVT_V1190_MICROCONTROLLER_FW_OPCODE                     = 0xC200,               
00385         CVT_V1190_WRITE_SPARE_OPCODE                            = 0xC300,               
00386         CVT_V1190_READ_SPARE_OPCODE                                     = 0xC400,               
00387         CVT_V1190_EN_TEST_MODE_OPCODE                           = 0xC500,               
00388         CVT_V1190_DIS_TEST_MODE_OPCODE                          = 0xC600,               
00389         CVT_V1190_SET_TDC_TEST_OUTPUT_OPCODE            = 0xC700,               
00390         CVT_V1190_SET_DLL_CLOCK_OPCODE                          = 0xC800,               
00391         CVT_V1190_READ_TDC_SETUP_SCAN_PATH_OPCODE       = 0xC800,               
00393 } CVT_V1190_MICRO_OPCODES;
00394 
00396 // Micro Handshake bitmasks
00398 
00400 
00405 
00406 typedef enum
00407 {
00408         CVT_V1190_MICRO_HND_WRITEOK_MSK                                 = 0x0001,               
00409         CVT_V1190_MICRO_HND_READOK_MSK                                  = 0x0002,               
00410 } CVT_V1190_MICRO_HND_BIT_MSK;
00411 
00413 
00417 
00418 typedef enum
00419 {
00420         CVT_V1190_CTRL_BERR_ENABLE_MSK                                  = 0x0001,               
00421         CVT_V1190_CTRL_TERM_MSK                                                 = 0x0002,               
00422         CVT_V1190_CTRL_TERM_SW_MSK                                              = 0x0004,               
00423         CVT_V1190_CTRL_EMPTY_EVENT_MSK                                  = 0x0008,               
00424         CVT_V1190_CTRL_ALIGN64_MSK                                              = 0x0010,               
00425         CVT_V1190_CTRL_COMPENSATION_ENABLE_MSK                  = 0x0020,               
00426         CVT_V1190_CTRL_TEST_FIFO_ENABLE_MSK                             = 0x0040,               
00427         CVT_V1190_CTRL_READ_COMPENSATION_SRAM_ENABLE_MSK= 0x0080,               
00428         CVT_V1190_CTRL_EVENT_FIFO_ENABLE_MSK                    = 0x0100,               
00429         CVT_V1190_CTRL_TRIGGER_TIME_TAG_ENABLE_MSK              = 0x0200,               
00430 } CVT_V1190_CONTROL_MSK;
00431 
00433 
00437 
00438 typedef enum
00439 {
00440         CVT_V1190_STS_DREADY_MSK                                        = 0x0001,               
00441         CVT_V1190_STS_ALMOST_FULL_MSK                           = 0x0002,               
00442         CVT_V1190_STS_FULL_MSK                                          = 0x0004,               
00443         CVT_V1190_STS_TRG_MATCH_MSK                                     = 0x0008,               
00444         CVT_V1190_STS_HEADER_EN_MSK                                     = 0x0010,               
00445         CVT_V1190_STS_TERM_ON_MSK                                       = 0x0020,               
00446         CVT_V1190_STS_ERROR_0_MSK                                       = 0x0040,               
00447         CVT_V1190_STS_ERROR_1_MSK                                       = 0x0080,               
00448         CVT_V1190_STS_ERROR_2_MSK                                       = 0x0100,               
00449         CVT_V1190_STS_ERROR_3_MSK                                       = 0x0200,               
00450         CVT_V1190_STS_BERR_FLAG_MSK                                     = 0x0400,               
00451         CVT_V1190_STS_PURGED_MSK                                        = 0x0800,               
00452         CVT_V1190_STS_RES_0_MSK                                         = 0x1000,               
00453         CVT_V1190_STS_RES_1_MSK                                         = 0x2000,               
00454         CVT_V1190_STS_PAIR_MODE_MSK                                     = 0x4000,               
00455         CVT_V1190_STS_TRIGGER_LOST_MSK                          = 0x8000,               
00456 } CVT_V1190_STATUS_MSK;
00457 
00459 
00463 
00464 typedef enum
00465 {
00466         CVT_V1190_STS_RES_800PS                                         = 0x0000,               
00467         CVT_V1190_STS_RES_200PS                                         = 0x0001,               
00468         CVT_V1190_STS_RES_100PS                                         = 0x0002,               
00469 } CVT_V1190_STATUS_RES;
00470 
00471 #define CVT_V1190_STS_RES_MSK                                   0x3000                                                                                                                                                                                  
00472 #define CVT_V1190_GET_STATUS_RES( reg)                  ((((UINT16)reg)& CVT_V1190_STS_RES_MSK)>> 12)                                                                                                   
00473 #define CVT_V1190_SET_STATUS_RES( reg, value)   reg= (((UINT16)reg)& ~CVT_V1190_STS_RES_MSK)| ((((UINT16)value)<< 12)&CVT_V1190_STS_RES_MSK)    
00475 #define CVT_V1190_STS_ERROR_MSK                                 0x03C0                                                                                                                                                                                  
00476 #define CVT_V1190_GET_STATUS_ERROR( reg)                ((((UINT16)reg)& CVT_V1190_STS_ERROR_MSK)>> 6)                                                                                                  
00477 #define CVT_V1190_SET_STATUS_ERROR( reg, value) reg= (((UINT16)reg)& ~CVT_V1190_STS_ERROR_MSK)| ((((UINT16)value)<< 6)& CVT_V1190_STS_ERROR_MSK)
00479 
00480 
00484 
00485 typedef enum
00486 {
00487         CVT_V1190_ED_PAIR_MODE                                          = 0,                    
00488         CVT_V1190_ED_TRAILING_ONLY                                      = 1,                    
00489         CVT_V1190_ED_LEADING_ONLY                                       = 2,                    
00490         CVT_V1190_ED_TRAILING_AND_LEADING                       = 3,                    
00491 } CVT_V1190_EDGE_DETECTION_ENUM;
00492 
00494 
00498 
00499 typedef enum
00500 {
00501         CVT_V1190_TLL_800PS                                                     = 0,                    
00502         CVT_V1190_TLL_200PS                                                     = 1,                    
00503         CVT_V1190_TLL_100PS                                                     = 2,                    
00504 } CVT_V1190_TR_LEAD_LSB_ENUM;
00505 
00507 
00511 
00512 typedef enum
00513 {
00514         CVT_V1190_PRLT_100PS                                            = 0x0000,               
00515         CVT_V1190_PRLT_200PS                                            = 0x0001,               
00516         CVT_V1190_PRLT_400PS                                            = 0x0002,               
00517         CVT_V1190_PRLT_800PS                                            = 0x0003,               
00518         CVT_V1190_PRLT_1_6NS                                            = 0x0004,               
00519         CVT_V1190_PRLT_3_12NS                                           = 0x0005,               
00520         CVT_V1190_PRLT_6_25NS                                           = 0x0006,               
00521         CVT_V1190_PRLT_12_5NS                                           = 0x0007,               
00522 } CVT_V1190_PAIR_RES_LEADING_TIME_ENUM;
00523 
00524 #define CVT_V1190_PRLT_MSK                                                                              0x0007                                                                                                                                                  
00525 #define CVT_V1190_GET_PAIR_RES_LEADING_TIME( reg)                               ((UINT8)(((UINT16)reg)& CVT_V1190_PRLT_MSK))                                                                    
00526 #define CVT_V1190_SET_PAIR_RES_LEADING_TIME( reg, value)                reg= (((UINT16)reg)& ~CVT_V1190_PRLT_MSK)| ((UINT16)value& CVT_V1190_PRLT_MSK)  
00528 
00529 
00533 
00534 typedef enum
00535 {
00536         CVT_V1190_PRW_100PS                                                     = 0x0000,               
00537         CVT_V1190_PRW_200PS                                                     = 0x0001,               
00538         CVT_V1190_PRW_400PS                                                     = 0x0002,               
00539         CVT_V1190_PRW_800PS                                                     = 0x0003,               
00540         CVT_V1190_PRW_1_6NS                                                     = 0x0004,               
00541         CVT_V1190_PRW_3_12NS                                            = 0x0005,               
00542         CVT_V1190_PRW_6_25NS                                            = 0x0006,               
00543         CVT_V1190_PRW_12_5NS                                            = 0x0007,               
00544         CVT_V1190_PRW_25NS                                                      = 0x0008,               
00545         CVT_V1190_PRW_50NS                                                      = 0x0009,               
00546         CVT_V1190_PRW_100NS                                                     = 0x000A,               
00547         CVT_V1190_PRW_200NS                                                     = 0x000B,               
00548         CVT_V1190_PRW_400NS                                                     = 0x000C,               
00549         CVT_V1190_PRW_800NS                                                     = 0x000D,               
00550 } CVT_V1190_PAIR_RES_WIDTH_ENUM;
00551 
00552 #define CVT_V1190_PRW_MSK                                                 0x0F00                
00553 #define CVT_V1190_GET_PAIR_RES_WITH( reg)                 ((UINT8)((((UINT16)reg)& CVT_V1190_PRW_MSK)>> 8))                             
00554 #define CVT_V1190_SET_PAIR_RES_WITH( reg, value)  reg= (((UINT16)reg)& ~CVT_V1190_PRW_MSK)| (((UINT16)value)<< 8)       
00556 
00557 
00561 
00562 typedef enum
00563 {
00564         CVT_V1190_DT_5NS                                                        = 0,                    
00565         CVT_V1190_DT_10NS                                                       = 1,                    
00566         CVT_V1190_DT_30NS                                                       = 2,                    
00567         CVT_V1190_DT_100NS                                                      = 3,                    
00568 } CVT_V1190_DEAD_TIME_ENUM;
00569 
00571 
00575 
00576 typedef enum
00577 {
00578         CVT_V1190_ES_0                                                          = 0,                    
00579         CVT_V1190_ES_1                                                          = 1,                    
00580         CVT_V1190_ES_2                                                          = 2,                    
00581         CVT_V1190_ES_4                                                          = 3,                    
00582         CVT_V1190_ES_8                                                          = 4,                    
00583         CVT_V1190_ES_16                                                         = 5,                    
00584         CVT_V1190_ES_32                                                         = 6,                    
00585         CVT_V1190_ES_64                                                         = 7,                    
00586         CVT_V1190_ES_128                                                        = 8,                    
00587         CVT_V1190_ES_NO_LIMIT                                           = 9,                    
00588 } CVT_V1190_EVENT_SIZE_ENUM;
00589 
00591 
00596 
00597 typedef enum
00598 {
00599         CVT_V1190_ET_VERNIER_ERROR_MSK                                  = 0x0001,               
00600         CVT_V1190_ET_COARSE_ERROR_MSK                                   = 0x0002,               
00601         CVT_V1190_ET_CHANNEL_SELECT_ERROR_MSK                   = 0x0004,               
00602         CVT_V1190_ET_L1_BUFFER_PARITY_ERROR_MSK                 = 0x0008,               
00603         CVT_V1190_ET_TRIGGER_FIFO_PARITY_ERROR_MSK              = 0x0008,               
00604         CVT_V1190_ET_TRIGGER_MATCHING_ERROR_MSK                 = 0x0010,               
00605         CVT_V1190_ET_READOUT_FIFO_PARITY_ERROR_MSK              = 0x0020,               
00606         CVT_V1190_ET_READOUT_STATE_ERROR_MSK                    = 0x0040,               
00607         CVT_V1190_ET_SETUP_PARITY_ERROR_MSK                             = 0x0080,               
00608         CVT_V1190_ET_CONTROL_PARITY_ERROR_MSK                   = 0x0100,               
00609         CVT_V1190_ET_JTAG_INSTRUCTION_PARITY_ERROR_MSK  = 0x0200,               
00610 } CVT_V1190_ERROR_TYPES_MSK;
00611 
00613 
00617 
00618 typedef enum
00619 {
00620         CVT_V1190_FS_2                                                          = 0,                    
00621         CVT_V1190_FS_4                                                          = 1,                    
00622         CVT_V1190_FS_8                                                          = 2,                    
00623         CVT_V1190_FS_16                                                         = 3,                    
00624         CVT_V1190_FS_32                                                         = 4,                    
00625         CVT_V1190_FS_64                                                         = 5,                    
00626         CVT_V1190_FS_128                                                        = 6,                    
00627         CVT_V1190_FS_256                                                        = 7,                    
00628 } CVT_V1190_FIFO_SIZE_ENUM;
00629 
00631 
00635 
00636 typedef enum
00637 {
00638         CVT_V1190_DC_40MHZ                                                      = 0,                    
00639         CVT_V1190_DC_PLL40MHZ                                           = 1,                    
00640         CVT_V1190_DC_PLL160MHZ                                          = 2,                    
00641         CVT_V1190_DC_PLL320MHZ                                          = 3,                    
00642 } CVT_V1190_DLL_CLOCK_ENUM;
00643 
00645 
00649 
00650 typedef enum
00651 {
00652         CVT_V1190_MCCTRL_DISABLED_BOARD_MSK                     = 0x0000,               
00653         CVT_V1190_MCCTRL_LAST_BOARD_MSK                         = 0x0001,               
00654         CVT_V1190_MCCTRL_FIRST_BOARD_MSK                        = 0x0002,               
00655         CVT_V1190_MCCTRL_MID_BOARD_MSK                          = 0x0003,               
00656 } CVT_V1190_MCST_CBLT_CTRL_MSK;
00657 
00659 // Global variables declaration
00661 
00663 // Global methods declaration
00665 
00667 //
00668 //     B O A R D S   H A N D L I N G
00669 //
00671 
00673 
00685 
00686 BOOL cvt_V1190_open( cvt_V1190_data* p_data, UINT16 base_address, long vme_handle, CVT_V1190_TYPES type);
00687 
00689 
00697 
00698 BOOL cvt_V1190_close( cvt_V1190_data* p_data);
00699 
00701 //
00702 //     L E V E L   0   A P I s
00703 //
00705 
00707 //
00708 //     L E V E L   1   A P I s
00709 //
00711 
00713 
00724 
00725 BOOL vme_board_1190_write_2_micro( cvt_V1190_data* p_data, UINT16 ope_code, const UINT16* p_params, int num_params);
00726 
00728 
00739 
00740 BOOL vme_board_1190_read_from_micro( cvt_V1190_data* p_data, UINT16 ope_code, UINT16* p_params, int num_params);
00741 
00743 
00752 
00753 BOOL cvt_V1190_set_bitmask_control( cvt_V1190_data* p_data, CVT_V1190_CONTROL_MSK value);
00754 
00756 
00765 
00766 BOOL cvt_V1190_clear_bitmask_control( cvt_V1190_data* p_data, CVT_V1190_CONTROL_MSK value);
00767 
00769 //
00770 //     L E V E L   2   A P I s
00771 //
00773 
00775 
00783 
00784 BOOL cvt_V1190_set_windows_width( cvt_V1190_data* p_data, UINT16 value);
00785 
00787 
00795 
00796 BOOL cvt_V1190_set_windows_offset( cvt_V1190_data* p_data, UINT16 value);
00797 
00799 
00809 
00810 BOOL cvt_V1190_get_enable_pattern( cvt_V1190_data* p_data, UINT16 *p_enable_msk);
00811 
00813 
00820 
00821 BOOL cvt_V1190_set_trigger_match( cvt_V1190_data* p_data);
00822 
00824 
00831 
00832 BOOL cvt_V1190_set_head_trail_enable( cvt_V1190_data* p_data);
00833 
00835 
00842 
00843 BOOL cvt_V1190_set_head_trail_disable( cvt_V1190_data* p_data);
00844 
00846 
00857 
00858 BOOL cvt_V1190_read_MEB( cvt_V1190_data* p_data, void* p_buff, UINT32* p_buff_size);
00859 
00861 
00876 
00877 BOOL cvt_V1190_set_continuous_acquisition_mode( cvt_V1190_data* p_data, CVT_V1190_EDGE_DETECTION_ENUM edge_detection, CVT_V1190_PAIR_RES_WIDTH_ENUM res_width, const UINT16 *p_enable_msk);
00878 
00880 
00900 
00901 BOOL cvt_V1190_set_trigger_matching_acquisition_mode( cvt_V1190_data* p_data, UINT16 window_width, UINT16 window_offset, UINT16 extra_search_margin, UINT16 reject_margin, CVT_V1190_EDGE_DETECTION_ENUM edge_detection, CVT_V1190_PAIR_RES_WIDTH_ENUM res_width, const UINT16 *p_enable_msk, BOOL header_trailer_enable, BOOL empty_event_enable, BOOL trigger_time_tag_enable);
00902 
00904 
00913 
00914 BOOL cvt_V1190_set_interrupt( cvt_V1190_data* p_data, UINT8 level, UINT8 vector);
00915 
00917 
00927 
00928 BOOL cvt_V1190_set_readout_mode( cvt_V1190_data* p_data, BOOL bus_error_enable, BOOL align64_enable, UINT8 blt_event_number);
00929 
00931 
00943 
00944 BOOL cvt_V1190_get_status( cvt_V1190_data* p_data, BOOL *p_is_data_ready, BOOL *p_is_term_on, BOOL *p_is_buffer_full, BOOL *p_is_buffer_almost_full, CVT_V1190_STATUS_RES* p_resolution, UINT8* p_error_bitmask);
00945 
00947 
00955 
00956 BOOL cvt_V1190_get_event_counter( cvt_V1190_data* p_data, UINT32* p_counter);
00957 
00959 
00967 
00968 BOOL cvt_V1190_get_event_stored( cvt_V1190_data* p_data, UINT16* p_counter);
00969 
00971 
00982 
00983 BOOL cvt_V1190_get_system_info( cvt_V1190_data* p_data, UINT16 *p_firmware_rev, UINT16 *p_tdc_id_buff, UINT16 *p_micro_firmware_rev, UINT16 *p_serial_number);
00984 
00986 
00993 
00994 BOOL cvt_V1190_data_clear( cvt_V1190_data* p_data);
00995 
00997 
01004 
01005 BOOL cvt_V1190_module_reset( cvt_V1190_data* p_data);
01006 
01008 
01017 
01018 BOOL cvt_V1190_set_channel_enable( cvt_V1190_data* p_data, const UINT16* p_enable_msk);
01019 
01021 
01032 
01033 BOOL cvt_V1190_set_almost_full( cvt_V1190_data* p_data, UINT16 almost_full_value);
01034 
01035 #ifdef CVT_V1190_USE_DATA_QUEUE
01036 
01038 
01053 
01054 BOOL cvt_V1190_peek_event( cvt_V1190_data *p_data, UINT32 *out_buff, long *p_out_buff_size, UINT32 *p_event_count);
01055 
01057 
01067 
01068 BOOL cvt_V1190_inqueue( cvt_V1190_data* p_data, const UINT32* in_buff, UINT32 in_buff_size);
01069 
01071 
01081 
01082 BOOL cvt_V1190_dequeue( cvt_V1190_data* p_data, UINT32 *out_buff, UINT32 out_buff_size);
01083 
01085 
01091 
01092 long cvt_V1190_get_queue_free( cvt_V1190_data* p_data);
01093 
01095 
01101 
01102 long cvt_V1190_get_queue_length( cvt_V1190_data* p_data);
01103 
01104 #endif  // CVT_V1190_USE_DATA_QUEUE
01105 
01107 
01117 
01118 BOOL cvt_V1190_set_MCST_CBLT( cvt_V1190_data* p_data, UINT8 address, MCST_CBLT_board_pos pos);
01119 
01120 #endif  // __CVT_V1190_DEF_H

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