cvt_V1724.h

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00001 
00002 
00010 
00011 #ifndef __CVT_V1724_DEF_H
00012 #define __CVT_V1724_DEF_H
00013 
00015 // File includes
00017 #include "cvt_common_defs.h"
00018 #include "cvt_board_commons.h"
00020 // Global defines
00022 
00023 #define CVT_V1724_THRESHOLD_NUM                 8                       
00025 
00026 
00031 
00032 #define CVT_V1724_USE_DATA_QUEUE        1
00033 
00035 
00041 
00042 typedef struct
00043 {
00044         cvt_board_data  m_common_data;                          
00045         //
00046         // Board specific data
00047 
00048         UINT32 *m_tmp_sample_buffer;                            
00049         UINT32 m_tmp_sample_buffer_size;                        
00050         // TODO: add other variables here
00051 } cvt_V1724_data;
00052 
00054 // Registers address
00056 //
00057 // Channel broadcast registers
00058 #define CVT_V1724_BROAD_CH_CTRL_ADD                                     0x8000                          
00059 #define CVT_V1724_BROAD_CH_SET_CTRL_ADD                         0x8004                          
00060 #define CVT_V1724_BROAD_CH_CLEAR_CTRL_ADD                       0x8008                          
00061 #define CVT_V1724_BROAD_CH_BLKSIZE_ADD                          0x800C                          
00062 #define CVT_V1724_BROAD_CH_BLK_REM_NUM_ADD                      0x8010                          
00063 #define CVT_V1724_BROAD_CH_READ_CONF_ADD                        0x8014                          
00064 //
00065 // VME registers
00066 #define CVT_V1724_CONTROL_ADD                                           0x8104                          
00067 #define CVT_V1724_STATUS_ADD                                            0x8106                          
00068 #define CVT_V1724_INT_LEVEL_ADD                                         0x8108                          
00069 #define CVT_V1724_INT_VECTOR_ADD                                        0x810A                          
00070 #define CVT_V1724_GEO_ADDRESS_ADD                                       0x810C                          
00071 #define CVT_V1724_MCST_CBLT_ADDRESS_ADD                         0x810E                          
00072 #define CVT_V1724_MCST_CBLT_CTRL_ADD                            0x8110                          
00073 #define CVT_V1724_SW_RESET_ADD                                          0x8112                          
00074 #define CVT_V1724_SW_CLEAR_ADD                                          0x8114                          
00075 #define CVT_V1724_SW_TRIGGER_ADD                                        0x8116                          
00076 #define CVT_V1724_TRIGGER_ENABLE_ADD                            0x811C                          
00077 #define CVT_V1724_BLT_EVENT_NUM_ADD                                     0x811E                          
00078 #define CVT_V1724_FW_REV_ADD                                            0x8120                          
00079 #define CVT_V1724_TEST_REG_ADD                                          0x8124                          
00080 #define CVT_V1724_FLASH_EN_ADD                                          0x812C                          
00081 #define CVT_V1724_FLASH_ADD                                                     0x812E                          
00082 #define CVT_V1724_DUMMY16_ADD                                           0x8130                          
00083 #define CVT_V1724_DUMMY32_ADD                                           0x8132                          
00084 #define CVT_V1724_POST_TRIG_ADD                                         0x8136                          
00085 #define CVT_V1724_FRONT_PANEL_IO_ADD                            0x813C                          
00086 #define CVT_V1724_FRONT_PANEL_IO_CTRL_ADD                       0x813E                          
00087 //
00088 // CH 0
00089 #define CVT_V1724_CH0_THRESHOLD_ADD                                     0x1080                          
00090 #define CVT_V1724_CH0_THR_SAMPLE_ADD                            0x1084                          
00091 #define CVT_V1724_CH0_STATUS_ADD                                        0x1088                          
00092 #define CVT_V1724_CH0_FW_REV_ADD                                        0x108C                          
00093 #define CVT_V1724_CH0_READ_BLK_TRIG_ADD                         0x1090                          
00094 #define CVT_V1724_CH0_BLK_WRI_NUM_ADD                           0x1094                          
00095 #define CVT_V1724_CH0_DAC_CONF_ADD                                      0x1098                          
00096 #define CVT_V1724_CH0_CONF_ADD                                          0x109C                          
00097 #define CVT_V1724_CH0_DEBUG_ADD                                         0x10A0                          
00098 //
00099 // CH 1
00100 #define CVT_V1724_CH1_THRESHOLD_ADD                                     0x1180                          
00101 #define CVT_V1724_CH1_THR_SAMPLE_ADD                            0x1184                          
00102 #define CVT_V1724_CH1_STATUS_ADD                                        0x1188                          
00103 #define CVT_V1724_CH1_FW_REV_ADD                                        0x118C                          
00104 #define CVT_V1724_CH1_READ_BLK_TRIG_ADD                         0x1190                          
00105 #define CVT_V1724_CH1_BLK_WRI_NUM_ADD                           0x1194                          
00106 #define CVT_V1724_CH1_DAC_CONF_ADD                                      0x1198                          
00107 #define CVT_V1724_CH1_CONF_ADD                                          0x119C                          
00108 #define CVT_V1724_CH1_DEBUG_ADD                                         0x11A0                          
00109 //
00110 // CH 2
00111 #define CVT_V1724_CH2_THRESHOLD_ADD                                     0x1280                          
00112 #define CVT_V1724_CH2_THR_SAMPLE_ADD                            0x1284                          
00113 #define CVT_V1724_CH2_STATUS_ADD                                        0x1288                          
00114 #define CVT_V1724_CH2_FW_REV_ADD                                        0x128C                          
00115 #define CVT_V1724_CH2_READ_BLK_TRIG_ADD                         0x1290                          
00116 #define CVT_V1724_CH2_BLK_WRI_NUM_ADD                           0x1294                          
00117 #define CVT_V1724_CH2_DAC_CONF_ADD                                      0x1298                          
00118 #define CVT_V1724_CH2_CONF_ADD                                          0x129C                          
00119 #define CVT_V1724_CH2_DEBUG_ADD                                         0x12A0                          
00120 //
00121 // CH 3
00122 #define CVT_V1724_CH3_THRESHOLD_ADD                                     0x1380                          
00123 #define CVT_V1724_CH3_THR_SAMPLE_ADD                            0x1384                          
00124 #define CVT_V1724_CH3_STATUS_ADD                                        0x1388                          
00125 #define CVT_V1724_CH3_FW_REV_ADD                                        0x138C                          
00126 #define CVT_V1724_CH3_READ_BLK_TRIG_ADD                         0x1390                          
00127 #define CVT_V1724_CH3_BLK_WRI_NUM_ADD                           0x1394                          
00128 #define CVT_V1724_CH3_DAC_CONF_ADD                                      0x1398                          
00129 #define CVT_V1724_CH3_CONF_ADD                                          0x139C                          
00130 #define CVT_V1724_CH3_DEBUG_ADD                                         0x13A0                          
00131 //
00132 // CH 4
00133 #define CVT_V1724_CH4_THRESHOLD_ADD                                     0x1480                          
00134 #define CVT_V1724_CH4_THR_SAMPLE_ADD                            0x1484                          
00135 #define CVT_V1724_CH4_STATUS_ADD                                        0x1488                          
00136 #define CVT_V1724_CH4_FW_REV_ADD                                        0x148C                          
00137 #define CVT_V1724_CH4_READ_BLK_TRIG_ADD                         0x1490                          
00138 #define CVT_V1724_CH4_BLK_WRI_NUM_ADD                           0x1494                          
00139 #define CVT_V1724_CH4_DAC_CONF_ADD                                      0x1498                          
00140 #define CVT_V1724_CH4_CONF_ADD                                          0x149C                          
00141 #define CVT_V1724_CH4_DEBUG_ADD                                         0x14A0                          
00142 //
00143 // CH 5
00144 #define CVT_V1724_CH5_THRESHOLD_ADD                                     0x1580                          
00145 #define CVT_V1724_CH5_THR_SAMPLE_ADD                            0x1584                          
00146 #define CVT_V1724_CH5_STATUS_ADD                                        0x1588                          
00147 #define CVT_V1724_CH5_FW_REV_ADD                                        0x158C                          
00148 #define CVT_V1724_CH5_READ_BLK_TRIG_ADD                         0x1590                          
00149 #define CVT_V1724_CH5_BLK_WRI_NUM_ADD                           0x1594                          
00150 #define CVT_V1724_CH5_DAC_CONF_ADD                                      0x1598                          
00151 #define CVT_V1724_CH5_CONF_ADD                                          0x159C                          
00152 #define CVT_V1724_CH5_DEBUG_ADD                                         0x15A0                          
00153 //
00154 // CH 6
00155 #define CVT_V1724_CH6_THRESHOLD_ADD                                     0x1680                          
00156 #define CVT_V1724_CH6_THR_SAMPLE_ADD                            0x1684                          
00157 #define CVT_V1724_CH6_STATUS_ADD                                        0x1688                          
00158 #define CVT_V1724_CH6_FW_REV_ADD                                        0x168C                          
00159 #define CVT_V1724_CH6_READ_BLK_TRIG_ADD                         0x1690                          
00160 #define CVT_V1724_CH6_BLK_WRI_NUM_ADD                           0x1694                          
00161 #define CVT_V1724_CH6_DAC_CONF_ADD                                      0x1698                          
00162 #define CVT_V1724_CH6_CONF_ADD                                          0x169C                          
00163 #define CVT_V1724_CH6_DEBUG_ADD                                         0x16A0                          
00164 //
00165 // CH 7
00166 #define CVT_V1724_CH7_THRESHOLD_ADD                                     0x1780                          
00167 #define CVT_V1724_CH7_THR_SAMPLE_ADD                            0x1784                          
00168 #define CVT_V1724_CH7_STATUS_ADD                                        0x1788                          
00169 #define CVT_V1724_CH7_FW_REV_ADD                                        0x178C                          
00170 #define CVT_V1724_CH7_READ_BLK_TRIG_ADD                         0x1790                          
00171 #define CVT_V1724_CH7_BLK_WRI_NUM_ADD                           0x1794                          
00172 #define CVT_V1724_CH7_DAC_CONF_ADD                                      0x1798                          
00173 #define CVT_V1724_CH7_CONF_ADD                                          0x179C                          
00174 #define CVT_V1724_CH7_DEBUG_ADD                                         0x17A0                          
00176 
00177 // Registers data size
00178 
00179 //
00180 // Channel broadcast registers
00181 #define CVT_V1724_BROAD_CH_CTRL_DATA_SIZE                       cvD32                           
00182 #define CVT_V1724_BROAD_CH_SET_CTRL_DATA_SIZE           cvD32                           
00183 #define CVT_V1724_BROAD_CH_CLEAR_CTRL_DATA_SIZE         cvD32                           
00184 #define CVT_V1724_BROAD_CH_BLKSIZE_DATA_SIZE            cvD32                           
00185 #define CVT_V1724_BROAD_CH_BLK_REM_NUM_DATA_SIZE        cvD32                           
00186 #define CVT_V1724_BROAD_CH_READ_CONF_DATA_SIZE          cvD32                           
00187 //
00188 // VME registers
00189 #define CVT_V1724_CONTROL_DATA_SIZE                                     cvD16                           
00190 #define CVT_V1724_STATUS_DATA_SIZE                                      cvD16                           
00191 #define CVT_V1724_INT_LEVEL_DATA_SIZE                           cvD16                           
00192 #define CVT_V1724_INT_VECTOR_DATA_SIZE                          cvD16                           
00193 #define CVT_V1724_GEO_ADDRESS_DATA_SIZE                         cvD16                           
00194 #define CVT_V1724_MCST_CBLT_ADDRESS_DATA_SIZE           cvD16                           
00195 #define CVT_V1724_MCST_CBLT_CTRL_DATA_SIZE                      cvD16                           
00196 #define CVT_V1724_SW_RESET_DATA_SIZE                            cvD16                           
00197 #define CVT_V1724_SW_CLEAR_DATA_SIZE                            cvD16                           
00198 #define CVT_V1724_SW_TRIGGER_DATA_SIZE                          cvD16                           
00199 #define CVT_V1724_TRIGGER_ENABLE_DATA_SIZE                      cvD16                           
00200 #define CVT_V1724_BLT_EVENT_NUM_DATA_SIZE                       cvD16                           
00201 #define CVT_V1724_FW_REV_DATA_SIZE                                      cvD32                           
00202 #define CVT_V1724_TEST_REG_DATA_SIZE                            cvD32                           
00203 #define CVT_V1724_FLASH_EN_DATA_SIZE                            cvD16                           
00204 #define CVT_V1724_FLASH_DATA_SIZE                                       cvD16                           
00205 #define CVT_V1724_DUMMY16_DATA_SIZE                                     cvD16                           
00206 #define CVT_V1724_DUMMY32_DATA_SIZE                                     cvD32                           
00207 #define CVT_V1724_POST_TRIG_DATA_SIZE                           cvD32                           
00208 #define CVT_V1724_FRONT_PANEL_IO_DATA_SIZE                      cvD16                           
00209 #define CVT_V1724_FRONT_PANEL_IO_CTRL_DATA_SIZE         cvD16                           
00211 //
00212 // CH 0
00213 #define CVT_V1724_CH0_THRESHOLD_DATA_SIZE                       cvD32                           
00214 #define CVT_V1724_CH0_THR_SAMPLE_DATA_SIZE                      cvD32                           
00215 #define CVT_V1724_CH0_STATUS_DATA_SIZE                          cvD32                           
00216 #define CVT_V1724_CH0_FW_REV_DATA_SIZE                          cvD32                           
00217 #define CVT_V1724_CH0_READ_BLK_TRIG_DATA_SIZE           cvD32                           
00218 #define CVT_V1724_CH0_BLK_WRI_NUM_DATA_SIZE                     cvD32                           
00219 #define CVT_V1724_CH0_DAC_CONF_DATA_SIZE                        cvD32                           
00220 #define CVT_V1724_CH0_CONF_DATA_SIZE                            cvD32                           
00221 #define CVT_V1724_CH0_DEBUG_DATA_SIZE                           cvD32                           
00222 //
00223 // CH 1
00224 #define CVT_V1724_CH1_THRESHOLD_DATA_SIZE                       cvD32                           
00225 #define CVT_V1724_CH1_THR_SAMPLE_DATA_SIZE                      cvD32                           
00226 #define CVT_V1724_CH1_STATUS_DATA_SIZE                          cvD32                           
00227 #define CVT_V1724_CH1_FW_REV_DATA_SIZE                          cvD32                           
00228 #define CVT_V1724_CH1_READ_BLK_TRIG_DATA_SIZE           cvD32                           
00229 #define CVT_V1724_CH1_BLK_WRI_NUM_DATA_SIZE                     cvD32                           
00230 #define CVT_V1724_CH1_DAC_CONF_DATA_SIZE                        cvD32                           
00231 #define CVT_V1724_CH1_CONF_DATA_SIZE                            cvD32                           
00232 #define CVT_V1724_CH1_DEBUG_DATA_SIZE                           cvD32                           
00233 //
00234 // CH 2
00235 #define CVT_V1724_CH2_THRESHOLD_DATA_SIZE                       cvD32                           
00236 #define CVT_V1724_CH2_THR_SAMPLE_DATA_SIZE                      cvD32                           
00237 #define CVT_V1724_CH2_STATUS_DATA_SIZE                          cvD32                           
00238 #define CVT_V1724_CH2_FW_REV_DATA_SIZE                          cvD32                           
00239 #define CVT_V1724_CH2_READ_BLK_TRIG_DATA_SIZE           cvD32                           
00240 #define CVT_V1724_CH2_BLK_WRI_NUM_DATA_SIZE                     cvD32                           
00241 #define CVT_V1724_CH2_DAC_CONF_DATA_SIZE                        cvD32                           
00242 #define CVT_V1724_CH2_CONF_DATA_SIZE                            cvD32                           
00243 #define CVT_V1724_CH2_DEBUG_DATA_SIZE                           cvD32                           
00244 //
00245 // CH 3
00246 #define CVT_V1724_CH3_THRESHOLD_DATA_SIZE                       cvD32                           
00247 #define CVT_V1724_CH3_THR_SAMPLE_DATA_SIZE                      cvD32                           
00248 #define CVT_V1724_CH3_STATUS_DATA_SIZE                          cvD32                           
00249 #define CVT_V1724_CH3_FW_REV_DATA_SIZE                          cvD32                           
00250 #define CVT_V1724_CH3_READ_BLK_TRIG_DATA_SIZE           cvD32                           
00251 #define CVT_V1724_CH3_BLK_WRI_NUM_DATA_SIZE                     cvD32                           
00252 #define CVT_V1724_CH3_DAC_CONF_DATA_SIZE                        cvD32                           
00253 #define CVT_V1724_CH3_CONF_DATA_SIZE                            cvD32                           
00254 #define CVT_V1724_CH3_DEBUG_DATA_SIZE                           cvD32                           
00255 //
00256 // CH 4
00257 #define CVT_V1724_CH4_THRESHOLD_DATA_SIZE                       cvD32                           
00258 #define CVT_V1724_CH4_THR_SAMPLE_DATA_SIZE                      cvD32                           
00259 #define CVT_V1724_CH4_STATUS_DATA_SIZE                          cvD32                           
00260 #define CVT_V1724_CH4_FW_REV_DATA_SIZE                          cvD32                           
00261 #define CVT_V1724_CH4_READ_BLK_TRIG_DATA_SIZE           cvD32                           
00262 #define CVT_V1724_CH4_BLK_WRI_NUM_DATA_SIZE                     cvD32                           
00263 #define CVT_V1724_CH4_DAC_CONF_DATA_SIZE                        cvD32                           
00264 #define CVT_V1724_CH4_CONF_DATA_SIZE                            cvD32                           
00265 #define CVT_V1724_CH4_DEBUG_DATA_SIZE                           cvD32                           
00266 //
00267 // CH 5
00268 #define CVT_V1724_CH5_THRESHOLD_DATA_SIZE                       cvD32                           
00269 #define CVT_V1724_CH5_THR_SAMPLE_DATA_SIZE                      cvD32                           
00270 #define CVT_V1724_CH5_STATUS_DATA_SIZE                          cvD32                           
00271 #define CVT_V1724_CH5_FW_REV_DATA_SIZE                          cvD32                           
00272 #define CVT_V1724_CH5_READ_BLK_TRIG_DATA_SIZE           cvD32                           
00273 #define CVT_V1724_CH5_BLK_WRI_NUM_DATA_SIZE                     cvD32                           
00274 #define CVT_V1724_CH5_DAC_CONF_DATA_SIZE                        cvD32                           
00275 #define CVT_V1724_CH5_CONF_DATA_SIZE                            cvD32                           
00276 #define CVT_V1724_CH5_DEBUG_DATA_SIZE                           cvD32                           
00277 //
00278 // CH 6
00279 #define CVT_V1724_CH6_THRESHOLD_DATA_SIZE                       cvD32                           
00280 #define CVT_V1724_CH6_THR_SAMPLE_DATA_SIZE                      cvD32                           
00281 #define CVT_V1724_CH6_STATUS_DATA_SIZE                          cvD32                           
00282 #define CVT_V1724_CH6_FW_REV_DATA_SIZE                          cvD32                           
00283 #define CVT_V1724_CH6_READ_BLK_TRIG_DATA_SIZE           cvD32                           
00284 #define CVT_V1724_CH6_BLK_WRI_NUM_DATA_SIZE                     cvD32                           
00285 #define CVT_V1724_CH6_DAC_CONF_DATA_SIZE                        cvD32                           
00286 #define CVT_V1724_CH6_CONF_DATA_SIZE                            cvD32                           
00287 #define CVT_V1724_CH6_DEBUG_DATA_SIZE                           cvD32                           
00288 //
00289 // CH 7
00290 #define CVT_V1724_CH7_THRESHOLD_DATA_SIZE                       cvD32                           
00291 #define CVT_V1724_CH7_THR_SAMPLE_DATA_SIZE                      cvD32                           
00292 #define CVT_V1724_CH7_STATUS_DATA_SIZE                          cvD32                           
00293 #define CVT_V1724_CH7_FW_REV_DATA_SIZE                          cvD32                           
00294 #define CVT_V1724_CH7_READ_BLK_TRIG_DATA_SIZE           cvD32                           
00295 #define CVT_V1724_CH7_BLK_WRI_NUM_DATA_SIZE                     cvD32                           
00296 #define CVT_V1724_CH7_DAC_CONF_DATA_SIZE                        cvD32                           
00297 #define CVT_V1724_CH7_CONF_DATA_SIZE                            cvD32                           
00298 #define CVT_V1724_CH7_DEBUG_DATA_SIZE                           cvD32                           
00300 
00301 // Registers address modifiers
00302 
00303 //
00304 // Channel broadcast registers
00305 #define CVT_V1724_BROAD_CH_CTRL_AM                      cvA32_S_DATA                            
00306 #define CVT_V1724_BROAD_CH_SET_CTRL_AM          cvA32_S_DATA                            
00307 #define CVT_V1724_BROAD_CH_CLEAR_CTRL_AM        cvA32_S_DATA                            
00308 #define CVT_V1724_BROAD_CH_BLKSIZE_AM           cvA32_S_DATA                            
00309 #define CVT_V1724_BROAD_CH_BLK_REM_NUM_AM       cvA32_S_DATA                            
00310 #define CVT_V1724_BROAD_CH_READ_CONF_AM         cvA32_S_DATA                            
00311 //
00312 // VME registers
00313 #define CVT_V1724_CONTROL_AM                            cvA32_S_DATA                            
00314 #define CVT_V1724_STATUS_AM                                     cvA32_S_DATA                            
00315 #define CVT_V1724_INT_LEVEL_AM                          cvA32_S_DATA                            
00316 #define CVT_V1724_INT_VECTOR_AM                         cvA32_S_DATA                            
00317 #define CVT_V1724_GEO_ADDRESS_AM                        cvA32_S_DATA                            
00318 #define CVT_V1724_MCST_CBLT_ADDRESS_AM          cvA32_S_DATA                            
00319 #define CVT_V1724_MCST_CBLT_CTRL_AM                     cvA32_S_DATA                            
00320 #define CVT_V1724_SW_RESET_AM                           cvA32_S_DATA                            
00321 #define CVT_V1724_SW_CLEAR_AM                           cvA32_S_DATA                            
00322 #define CVT_V1724_SW_TRIGGER_AM                         cvA32_S_DATA                            
00323 #define CVT_V1724_TRIGGER_ENABLE_AM                     cvA32_S_DATA                            
00324 #define CVT_V1724_BLT_EVENT_NUM_AM                      cvA32_S_DATA                            
00325 #define CVT_V1724_FW_REV_AM                                     cvA32_S_DATA                            
00326 #define CVT_V1724_TEST_REG_AM                           cvA32_S_DATA                            
00327 #define CVT_V1724_FLASH_EN_AM                           cvA32_S_DATA                            
00328 #define CVT_V1724_FLASH_AM                                      cvA32_S_DATA                            
00329 #define CVT_V1724_DUMMY16_AM                            cvA32_S_DATA                            
00330 #define CVT_V1724_DUMMY32_AM                            cvA32_S_DATA                            
00331 #define CVT_V1724_POST_TRIG_AM                          cvA32_S_DATA                            
00332 #define CVT_V1724_FRONT_PANEL_IO_AM                     cvA32_S_DATA                            
00333 #define CVT_V1724_FRONT_PANEL_IO_CTRL_AM        cvA32_S_DATA                            
00335 //
00336 // CH 0
00337 #define CVT_V1724_CH0_THRESHOLD_AM                      cvA32_S_DATA                            
00338 #define CVT_V1724_CH0_THR_SAMPLE_AM                     cvA32_S_DATA                            
00339 #define CVT_V1724_CH0_STATUS_AM                         cvA32_S_DATA                            
00340 #define CVT_V1724_CH0_FW_REV_AM                         cvA32_S_DATA                            
00341 #define CVT_V1724_CH0_READ_BLK_TRIG_AM          cvA32_S_BLT                                     
00342 #define CVT_V1724_CH0_BLK_WRI_NUM_AM            cvA32_S_DATA                            
00343 #define CVT_V1724_CH0_DAC_CONF_AM                       cvA32_S_DATA                            
00344 #define CVT_V1724_CH0_CONF_AM                           cvA32_S_DATA                            
00345 #define CVT_V1724_CH0_DEBUG_AM                          cvA32_S_DATA                            
00346 //
00347 // CH 1
00348 #define CVT_V1724_CH1_THRESHOLD_AM                      cvA32_S_DATA                            
00349 #define CVT_V1724_CH1_THR_SAMPLE_AM                     cvA32_S_DATA                            
00350 #define CVT_V1724_CH1_STATUS_AM                         cvA32_S_DATA                            
00351 #define CVT_V1724_CH1_FW_REV_AM                         cvA32_S_DATA                            
00352 #define CVT_V1724_CH1_READ_BLK_TRIG_AM          cvA32_S_BLT                                     
00353 #define CVT_V1724_CH1_BLK_WRI_NUM_AM            cvA32_S_DATA                            
00354 #define CVT_V1724_CH1_DAC_CONF_AM                       cvA32_S_DATA                            
00355 #define CVT_V1724_CH1_CONF_AM                           cvA32_S_DATA                            
00356 #define CVT_V1724_CH1_DEBUG_AM                          cvA32_S_DATA                            
00357 //
00358 // CH 2
00359 #define CVT_V1724_CH2_THRESHOLD_AM                      cvA32_S_DATA                            
00360 #define CVT_V1724_CH2_THR_SAMPLE_AM                     cvA32_S_DATA                            
00361 #define CVT_V1724_CH2_STATUS_AM                         cvA32_S_DATA                            
00362 #define CVT_V1724_CH2_FW_REV_AM                         cvA32_S_DATA                            
00363 #define CVT_V1724_CH2_READ_BLK_TRIG_AM          cvA32_S_BLT                                     
00364 #define CVT_V1724_CH2_BLK_WRI_NUM_AM            cvA32_S_DATA                            
00365 #define CVT_V1724_CH2_DAC_CONF_AM                       cvA32_S_DATA                            
00366 #define CVT_V1724_CH2_CONF_AM                           cvA32_S_DATA                            
00367 #define CVT_V1724_CH2_DEBUG_AM                          cvA32_S_DATA                            
00368 //
00369 // CH 3
00370 #define CVT_V1724_CH3_THRESHOLD_AM                      cvA32_S_DATA                            
00371 #define CVT_V1724_CH3_THR_SAMPLE_AM                     cvA32_S_DATA                            
00372 #define CVT_V1724_CH3_STATUS_AM                         cvA32_S_DATA                            
00373 #define CVT_V1724_CH3_FW_REV_AM                         cvA32_S_DATA                            
00374 #define CVT_V1724_CH3_READ_BLK_TRIG_AM          cvA32_S_BLT                                     
00375 #define CVT_V1724_CH3_BLK_WRI_NUM_AM            cvA32_S_DATA                            
00376 #define CVT_V1724_CH3_DAC_CONF_AM                       cvA32_S_DATA                            
00377 #define CVT_V1724_CH3_CONF_AM                           cvA32_S_DATA                            
00378 #define CVT_V1724_CH3_DEBUG_AM                          cvA32_S_DATA                            
00379 //
00380 // CH 4
00381 #define CVT_V1724_CH4_THRESHOLD_AM                      cvA32_S_DATA                            
00382 #define CVT_V1724_CH4_THR_SAMPLE_AM                     cvA32_S_DATA                            
00383 #define CVT_V1724_CH4_STATUS_AM                         cvA32_S_DATA                            
00384 #define CVT_V1724_CH4_FW_REV_AM                         cvA32_S_DATA                            
00385 #define CVT_V1724_CH4_READ_BLK_TRIG_AM          cvA32_S_BLT                                     
00386 #define CVT_V1724_CH4_BLK_WRI_NUM_AM            cvA32_S_DATA                            
00387 #define CVT_V1724_CH4_DAC_CONF_AM                       cvA32_S_DATA                            
00388 #define CVT_V1724_CH4_CONF_AM                           cvA32_S_DATA                            
00389 #define CVT_V1724_CH4_DEBUG_AM                          cvA32_S_DATA                            
00390 //
00391 // CH 5
00392 #define CVT_V1724_CH5_THRESHOLD_AM                      cvA32_S_DATA                            
00393 #define CVT_V1724_CH5_THR_SAMPLE_AM                     cvA32_S_DATA                            
00394 #define CVT_V1724_CH5_STATUS_AM                         cvA32_S_DATA                            
00395 #define CVT_V1724_CH5_FW_REV_AM                         cvA32_S_DATA                            
00396 #define CVT_V1724_CH5_READ_BLK_TRIG_AM          cvA32_S_BLT                                     
00397 #define CVT_V1724_CH5_BLK_WRI_NUM_AM            cvA32_S_DATA                            
00398 #define CVT_V1724_CH5_DAC_CONF_AM                       cvA32_S_DATA                            
00399 #define CVT_V1724_CH5_CONF_AM                           cvA32_S_DATA                            
00400 #define CVT_V1724_CH5_DEBUG_AM                          cvA32_S_DATA                            
00401 //
00402 // CH 6
00403 #define CVT_V1724_CH6_THRESHOLD_AM                      cvA32_S_DATA                            
00404 #define CVT_V1724_CH6_THR_SAMPLE_AM                     cvA32_S_DATA                            
00405 #define CVT_V1724_CH6_STATUS_AM                         cvA32_S_DATA                            
00406 #define CVT_V1724_CH6_FW_REV_AM                         cvA32_S_DATA                            
00407 #define CVT_V1724_CH6_READ_BLK_TRIG_AM          cvA32_S_BLT                                     
00408 #define CVT_V1724_CH6_BLK_WRI_NUM_AM            cvA32_S_DATA                            
00409 #define CVT_V1724_CH6_DAC_CONF_AM                       cvA32_S_DATA                            
00410 #define CVT_V1724_CH6_CONF_AM                           cvA32_S_DATA                            
00411 #define CVT_V1724_CH6_DEBUG_AM                          cvA32_S_DATA                            
00412 //
00413 // CH 7
00414 #define CVT_V1724_CH7_THRESHOLD_AM                      cvA32_S_DATA                            
00415 #define CVT_V1724_CH7_THR_SAMPLE_AM                     cvA32_S_DATA                            
00416 #define CVT_V1724_CH7_STATUS_AM                         cvA32_S_DATA                            
00417 #define CVT_V1724_CH7_FW_REV_AM                         cvA32_S_DATA                            
00418 #define CVT_V1724_CH7_READ_BLK_TRIG_AM          cvA32_S_BLT                                     
00419 #define CVT_V1724_CH7_BLK_WRI_NUM_AM            cvA32_S_DATA                            
00420 #define CVT_V1724_CH7_DAC_CONF_AM                       cvA32_S_DATA                            
00421 #define CVT_V1724_CH7_CONF_AM                           cvA32_S_DATA                            
00422 #define CVT_V1724_CH7_DEBUG_AM                          cvA32_S_DATA                            
00424 
00425 // Registers indexes
00426 
00427 
00429 
00434 
00435 typedef enum
00436 {
00437 //
00438 // Channel broadcast registers
00439         CVT_V1724_BROAD_CH_CTRL_INDEX,                                  
00440         CVT_V1724_BROAD_CH_SET_CTRL_INDEX,                              
00441         CVT_V1724_BROAD_CH_CLEAR_CTRL_INDEX,                    
00442         CVT_V1724_BROAD_CH_BLKSIZE_INDEX,                               
00443         CVT_V1724_BROAD_CH_BLK_REM_NUM_INDEX,                   
00444         CVT_V1724_BROAD_CH_READ_CONF_INDEX,                             
00445 //
00446 // VME registers
00447         CVT_V1724_CONTROL_INDEX,                                                
00448         CVT_V1724_STATUS_INDEX,                                                 
00449         CVT_V1724_INT_LEVEL_INDEX,                                              
00450         CVT_V1724_INT_VECTOR_INDEX,                                             
00451         CVT_V1724_GEO_ADDRESS_INDEX,                                    
00452         CVT_V1724_MCST_CBLT_ADDRESS_INDEX,                              
00453         CVT_V1724_MCST_CBLT_CTRL_INDEX,                                 
00454         CVT_V1724_SW_RESET_INDEX,                                               
00455         CVT_V1724_SW_CLEAR_INDEX,                                               
00456         CVT_V1724_SW_TRIGGER_INDEX,                                             
00457         CVT_V1724_TRIGGER_ENABLE_INDEX,                                 
00458         CVT_V1724_BLT_EVENT_NUM_INDEX,                                  
00459         CVT_V1724_FW_REV_INDEX,                                                 
00460         CVT_V1724_TEST_REG_INDEX,                                               
00461         CVT_V1724_FLASH_EN_INDEX,                                               
00462         CVT_V1724_FLASH_INDEX,                                                  
00463         CVT_V1724_DUMMY16_INDEX,                                                
00464         CVT_V1724_DUMMY32_INDEX,                                                
00465         CVT_V1724_POST_TRIG_INDEX,                                              
00466         CVT_V1724_FRONT_PANEL_IO_INDEX,                                 
00467         CVT_V1724_FRONT_PANEL_IO_CTRL_INDEX,                    
00468 //
00469 // CH 0
00470         CVT_V1724_CH0_THRESHOLD_INDEX,                                  
00471         CVT_V1724_CH0_THR_SAMPLE_INDEX,                                 
00472         CVT_V1724_CH0_STATUS_INDEX,                                             
00473         CVT_V1724_CH0_FW_REV_INDEX,                                             
00474         CVT_V1724_CH0_READ_BLK_TRIG_INDEX,                              
00475         CVT_V1724_CH0_BLK_WRI_NUM_INDEX,                                
00476         CVT_V1724_CH0_DAC_CONF_INDEX,                                   
00477         CVT_V1724_CH0_CONF_INDEX,                                               
00478         CVT_V1724_CH0_DEBUG_INDEX,                                              
00479 //
00480 // CH 1
00481         CVT_V1724_CH1_THRESHOLD_INDEX,                                  
00482         CVT_V1724_CH1_THR_SAMPLE_INDEX,                                 
00483         CVT_V1724_CH1_STATUS_INDEX,                                             
00484         CVT_V1724_CH1_FW_REV_INDEX,                                             
00485         CVT_V1724_CH1_READ_BLK_TRIG_INDEX,                              
00486         CVT_V1724_CH1_BLK_WRI_NUM_INDEX,                                
00487         CVT_V1724_CH1_DAC_CONF_INDEX,                                   
00488         CVT_V1724_CH1_CONF_INDEX,                                               
00489         CVT_V1724_CH1_DEBUG_INDEX,                                              
00490 //
00491 // CH 2
00492         CVT_V1724_CH2_THRESHOLD_INDEX,                                  
00493         CVT_V1724_CH2_THR_SAMPLE_INDEX,                                 
00494         CVT_V1724_CH2_STATUS_INDEX,                                             
00495         CVT_V1724_CH2_FW_REV_INDEX,                                             
00496         CVT_V1724_CH2_READ_BLK_TRIG_INDEX,                              
00497         CVT_V1724_CH2_BLK_WRI_NUM_INDEX,                                
00498         CVT_V1724_CH2_DAC_CONF_INDEX,                                   
00499         CVT_V1724_CH2_CONF_INDEX,                                               
00500         CVT_V1724_CH2_DEBUG_INDEX,                                              
00501 //
00502 // CH 3
00503         CVT_V1724_CH3_THRESHOLD_INDEX,                                  
00504         CVT_V1724_CH3_THR_SAMPLE_INDEX,                                 
00505         CVT_V1724_CH3_STATUS_INDEX,                                             
00506         CVT_V1724_CH3_FW_REV_INDEX,                                             
00507         CVT_V1724_CH3_READ_BLK_TRIG_INDEX,                              
00508         CVT_V1724_CH3_BLK_WRI_NUM_INDEX,                                
00509         CVT_V1724_CH3_DAC_CONF_INDEX,                                   
00510         CVT_V1724_CH3_CONF_INDEX,                                               
00511         CVT_V1724_CH3_DEBUG_INDEX,                                              
00512 //
00513 // CH 4
00514         CVT_V1724_CH4_THRESHOLD_INDEX,                                  
00515         CVT_V1724_CH4_THR_SAMPLE_INDEX,                                 
00516         CVT_V1724_CH4_STATUS_INDEX,                                             
00517         CVT_V1724_CH4_FW_REV_INDEX,                                             
00518         CVT_V1724_CH4_READ_BLK_TRIG_INDEX,                              
00519         CVT_V1724_CH4_BLK_WRI_NUM_INDEX,                                
00520         CVT_V1724_CH4_DAC_CONF_INDEX,                                   
00521         CVT_V1724_CH4_CONF_INDEX,                                               
00522         CVT_V1724_CH4_DEBUG_INDEX,                                              
00523 //
00524 // CH 5
00525         CVT_V1724_CH5_THRESHOLD_INDEX,                                  
00526         CVT_V1724_CH5_THR_SAMPLE_INDEX,                                 
00527         CVT_V1724_CH5_STATUS_INDEX,                                             
00528         CVT_V1724_CH5_FW_REV_INDEX,                                             
00529         CVT_V1724_CH5_READ_BLK_TRIG_INDEX,                              
00530         CVT_V1724_CH5_BLK_WRI_NUM_INDEX,                                
00531         CVT_V1724_CH5_DAC_CONF_INDEX,                                   
00532         CVT_V1724_CH5_CONF_INDEX,                                               
00533         CVT_V1724_CH5_DEBUG_INDEX,                                              
00534 //
00535 // CH 6
00536         CVT_V1724_CH6_THRESHOLD_INDEX,                                  
00537         CVT_V1724_CH6_THR_SAMPLE_INDEX,                                 
00538         CVT_V1724_CH6_STATUS_INDEX,                                             
00539         CVT_V1724_CH6_FW_REV_INDEX,                                             
00540         CVT_V1724_CH6_READ_BLK_TRIG_INDEX,                              
00541         CVT_V1724_CH6_BLK_WRI_NUM_INDEX,                                
00542         CVT_V1724_CH6_DAC_CONF_INDEX,                                   
00543         CVT_V1724_CH6_CONF_INDEX,                                               
00544         CVT_V1724_CH6_DEBUG_INDEX,                                              
00545 //
00546 // CH 7
00547         CVT_V1724_CH7_THRESHOLD_INDEX,                                  
00548         CVT_V1724_CH7_THR_SAMPLE_INDEX,                                 
00549         CVT_V1724_CH7_STATUS_INDEX,                                             
00550         CVT_V1724_CH7_FW_REV_INDEX,                                             
00551         CVT_V1724_CH7_READ_BLK_TRIG_INDEX,                              
00552         CVT_V1724_CH7_BLK_WRI_NUM_INDEX,                                
00553         CVT_V1724_CH7_DAC_CONF_INDEX,                                   
00554         CVT_V1724_CH7_CONF_INDEX,                                               
00555         CVT_V1724_CH7_DEBUG_INDEX,                                              
00557 } CVT_V792_REG_INDEX;
00558                                                                                                 
00559 #define CVT_V1724_MAX_CHANNEL                   8                       
00561 
00562 
00565 
00566 typedef enum
00567 {
00568         CVT_V1724_CTRL_SWITCH_CLKEN_MSK         = 0x0001,               
00569         CVT_V1724_CTRL_FREQ_SEL_MSK                     = 0x0002,               
00570         CVT_V1724_CTRL_BERR_ENABLE_MSK          = 0x0010,               
00571 } CVT_V1724_CONTROL_MSK;
00572 
00574 
00578 
00579 typedef enum
00580 {
00581         CVT_V1724_STS_FREE_MSK                          = 0x0001,               
00582 } CVT_V1724_STATUS_MSK;
00583 
00585 
00588 
00589 typedef enum
00590 {
00591         CVT_V1724_TRGEN_CH0_MSK                         = 0x0001,               
00592         CVT_V1724_TRGEN_CH1_MSK                         = 0x0002,               
00593         CVT_V1724_TRGEN_CH2_MSK                         = 0x0008,               
00594         CVT_V1724_TRGEN_CH3_MSK                         = 0x0010,               
00595         CVT_V1724_TRGEN_CH4_MSK                         = 0x0040,               
00596         CVT_V1724_TRGEN_CH5_MSK                         = 0x0080,               
00597         CVT_V1724_TRGEN_CH6_MSK                         = 0x0200,               
00598         CVT_V1724_TRGEN_CH7_MSK                         = 0x0400,               
00599         CVT_V1724_TRGEN_ENABLE_MSK                      = 0x2000,               
00600         CVT_V1724_TRGEN_EXT_MSK                         = 0x4000,               
00601         CVT_V1724_TRGEN_SW_MSK                          = 0x8000,               
00602 } CVT_V1724_TRIGGER_ENABLE_MSK;
00603 
00605 
00608 
00609 typedef enum
00610 {
00611         CVT_V1724_CHCTRL_SAMPLE_ACQ_MSK                 = 0x00000001,   
00612         CVT_V1724_CHCTRL_TRG_OVERLAP_MSK                = 0x00000002,   
00613         CVT_V1724_CHCTRL_MEM_ENABLE_MSK                 = 0x00000004,   
00614         CVT_V1724_CHCTRL_MEM_TEST_MSK                   = 0x00000008,   
00615         CVT_V1724_CHCTRL_MEM_RANDOM_ACC_MSK             = 0x00000010,   
00616         CVT_V1724_CHCTRL_TRG_IN_EN_MSK                  = 0x00000020,   
00617         CVT_V1724_CHCTRL_TRG_OUT_UNDER_EN_MSK   = 0x00000040,   
00618         CVT_V1724_CHCTRL_TRG_OUT_EN_MSK                 = 0x00000080,   
00619         CVT_V1724_CHCTRL_BIST_TEST_MSK                  = 0x00000100,   
00620         CVT_V1724_CHCTRL_READ_MEM_MSK                   = 0x00000200,   
00621 } CVT_V1724_CH_CONTROL_MSK;
00622 
00624 
00627 
00628 typedef enum
00629 {
00630         CVT_V1724_CHRDC_BLOCK_ADD_MSK           = 0x00000FFF,   
00631         CVT_V1724_CHRDC_SAMPLE_NUM_MSK          = 0x003FF000,   
00632         CVT_V1724_CHRDC_OFFSET_MSK                      = 0xFFC00000,   
00633 } CVT_V1724_CH_READ_CONF_MSK;
00634 
00635 #define CVT_V1724_GET_CH_READ_CONF_BLOCK_ADD( reg)                      (((UINT32)reg)& CVT_V1724_CHRDC_BLOCK_ADD_MSK)                                                                                                                                          
00636 #define CVT_V1724_SET_CH_READ_CONF_BLOCK_ADD( reg, value)       reg= (((UINT32)reg)& ~CVT_V1724_CHRDC_BLOCK_ADD_MSK)| ((UINT32)value& CVT_V1724_CHRDC_BLOCK_ADD_MSK)                            
00638 #define CVT_V1724_GET_CH_READ_CONF_SAMPLE_NUM( reg)                     ((((UINT32)reg)& CVT_V1724_CHRDC_SAMPLE_NUM_MSK)>> 12)                                                                                                                          
00639 #define CVT_V1724_SET_CH_READ_CONF_SAMPLE_NUM( reg, value)      reg= (((UINT32)reg)& ~CVT_V1724_CHRDC_SAMPLE_NUM_MSK)| ((((UINT32)value)<< 12)& CVT_V1724_CHRDC_SAMPLE_NUM_MSK)         
00641 #define CVT_V1724_GET_CH_READ_CONF_OFFSET( reg)                         ((((UINT32)reg)& CVT_V1724_CHRDC_OFFSET_MSK)>> 22)                                                                                                                                      
00642 #define CVT_V1724_SET_CH_READ_CONF_OFFSET( reg, value)          reg= (((UINT32)reg)& ~CVT_V1724_CHRDC_OFFSET_MSK)| ((((UINT32)value)<< 22)& CVT_V1724_CHRDC_OFFSET_MSK)                         
00644 
00645 
00648 
00649 typedef enum
00650 {
00651         CVT_V1724_CHCONF_DITHER_MSK                     = 0x00000001,   
00652         CVT_V1724_CHCONF_OUTPUT_MODE_MSK        = 0x00000002,   
00653         CVT_V1724_CHCONF_RND_MSK                        = 0x00000004,   
00654 } CVT_V1724_CH_CONF_MSK;
00655 
00657 
00661 
00662 typedef enum
00663 {
00664         CVT_V1724_CHDAC_DATA_MSK                        = 0x0000FFFF,   
00665         CVT_V1724_CHDAC_SET_A_MSK                       = 0x00100000,   
00666         CVT_V1724_CHDAC_SET_B_MSK                       = 0x00240000,   
00667 } CVT_V1724_DAC_CONF_MSK;
00668 
00669 
00670 #define CVT_V1724_GET_CH_DAC_CONF( reg)                 (((UINT32)reg)& CVT_V1724_CHDAC_DATA_MSK)                                                                                                                               
00671 #define CVT_V1724_SET_CH_DAC_CONF( reg, value)  reg= (((UINT32)reg)& ~CVT_V1724_CHDAC_DATA_MSK)| ((UINT32)value& CVT_V1724_CHDAC_DATA_MSK)                              
00673 
00674 
00677 
00678 typedef enum
00679 {
00680         CVT_V1724_CHSTS_FIFO_FULL_MSK           = 0x00000001,   
00681         CVT_V1724_CHSTS_FIFO_EMPTY_MSK          = 0x00000002,   
00682         CVT_V1724_CHSTS_DAC_BUSY_MSK            = 0x00000004,   
00683         CVT_V1724_CHSTS_BIST_END_MSK            = 0x00000008,   
00684         CVT_V1724_CHSTS_BIST_OK_MSK                     = 0x00000010,   
00685         CVT_V1724_CHSTS_BLOCK_REM_OK_MSK        = 0x00000020,   
00686 } CVT_V1724_CH_STATUS_MSK;
00687   
00689 
00692 
00693 typedef enum
00694 {
00695         CVT_V1724_CHBKSZ_512K= 0,                       
00696         CVT_V1724_CHBKSZ_256K,                          
00697         CVT_V1724_CHBKSZ_128K,                          
00698         CVT_V1724_CHBKSZ_64K,                           
00699         CVT_V1724_CHBKSZ_32K,                           
00700         CVT_V1724_CHBKSZ_16K,                           
00701         CVT_V1724_CHBKSZ_8K,                            
00702         CVT_V1724_CHBKSZ_4K,                            
00703         CVT_V1724_CHBKSZ_2K,                            
00704         CVT_V1724_CHBKSZ_1K,                            
00705         CVT_V1724_CHBKSZ_512,                           
00706 } CVT_V1724_CH_BLKSIZE;
00707 
00709 
00713 
00714 typedef enum
00715 {
00716         CVT_V1724_MCCTRL_DISABLED_BOARD_MSK                     = 0x0000,               
00717         CVT_V1724_MCCTRL_LAST_BOARD_MSK                         = 0x0001,               
00718         CVT_V1724_MCCTRL_FIRST_BOARD_MSK                        = 0x0002,               
00719         CVT_V1724_MCCTRL_MID_BOARD_MSK                          = 0x0003,               
00720 } CVT_V1724_MCST_CBLT_CTRL_MSK;
00721 
00723 // Global variables declaration
00725 
00727 // Global methods declaration
00729 
00731 //
00732 //     B O A R D S   H A N D L I N G
00733 //
00735 
00737 
00747 
00748 BOOL cvt_V1724_open( cvt_V1724_data* p_data, UINT16 base_address, long vme_handle);
00749 
00751 
00759 
00760 BOOL cvt_V1724_close( cvt_V1724_data* p_data);
00761 
00763 //
00764 //     L E V E L   0   A P I s
00765 //
00767 
00768 
00770 //
00771 //     L E V E L   1   A P I s
00772 //
00774 
00775         
00777 //
00778 //     L E V E L   2   A P I s
00779 //
00781 
00782 
00784 
00796 
00797 BOOL cvt_V1724_read_buffer( cvt_V1724_data* p_data, UINT8 ch_index, UINT16* p_buff, UINT32* p_buff_size);
00798 
00800 
00815 
00816 BOOL cvt_V1724_set_trigger_mode( cvt_V1724_data* p_data, BOOL falling_edge_enable, BOOL trigger_in_enable, BOOL trigger_out_enable, BOOL ext_trigger_enable, BOOL sw_trigger_enable, UINT8 ch_trigger_enable_msk, BOOL trigger_overlap_enable, UINT32 post_trigger);
00817 
00819 
00829 
00830 BOOL cvt_V1724_set_acquisition_mode( cvt_V1724_data* p_data, BOOL sample_enable, CVT_V1724_CH_BLKSIZE block_size);
00831 
00833 
00842 
00843 BOOL cvt_V1724_set_dither_enable( cvt_V1724_data* p_data, UINT8 ch_msk, BOOL dither_value);
00844 
00846 
00857 
00858 BOOL cvt_V1724_set_interrupt( cvt_V1724_data* p_data, UINT8 level, UINT8 vector, UINT8 event_number);
00859 
00861 
00871 
00872 BOOL cvt_V1724_set_readout_mode( cvt_V1724_data* p_data, BOOL enable_bus_error, UINT16 BLT_event_number);
00873 
00875 
00882 
00883 BOOL cvt_V1724_software_reset( cvt_V1724_data* p_data);
00884 
00886 
00893 
00894 BOOL cvt_V1724_data_clear( cvt_V1724_data* p_data);
00895 
00897 
00906 
00907 BOOL cvt_V1724_set_channel_offset( cvt_V1724_data* p_data, UINT8 ch_msk, UINT16 offset_value);
00908 
00910 
00920 
00921 BOOL cvt_V1724_set_channel_trigger( cvt_V1724_data* p_data, UINT8 ch_msk, UINT32 trigger_threshold, UINT32 threshold_samples);
00922 
00924 
00932 
00933 BOOL cvt_V1724_software_trigger( cvt_V1724_data* p_data);
00934 
00936 
00947 
00948 BOOL cvt_V1724_get_channel_status( cvt_V1724_data* p_data, UINT8 ch_index, BOOL *p_is_dac_busy, BOOL *p_is_fifo_full, BOOL *p_is_fifo_almost_full, BOOL *p_is_block_remove_ok);
00949 
00951 
00961 
00962 BOOL cvt_V1724_get_system_info( cvt_V1724_data* p_data, UINT16 *p_firmware_rev, UINT16 *p_serial_number);
00963 
00965 
00975 
00976 BOOL cvt_V1724_set_MCST_CBLT( cvt_V1724_data* p_data, UINT8 address, MCST_CBLT_board_pos pos);
00977 
00978 #endif  // __CVT_V1724_DEF_H

Generated on Wed Oct 18 12:36:55 2006 for CAEVMEToolLib by  doxygen 1.4.6-NO