#include "cvt_common_defs.h"
#include "cvt_board_commons.h"
Go to the source code of this file.
Data Structures | |
struct | cvt_V1724_data |
V1724 board data structure. More... | |
Defines | |
#define | CVT_V1724_THRESHOLD_NUM 8 |
Number of threshold registers. | |
#define | CVT_V1724_USE_DATA_QUEUE 1 |
Enable/ disable V1724 builtin data queue. | |
#define | CVT_V1724_BROAD_CH_CTRL_ADD 0x8000 |
Control channel broadcast register relative address. | |
#define | CVT_V1724_BROAD_CH_SET_CTRL_ADD 0x8004 |
Set control channel broadcast register relative address. | |
#define | CVT_V1724_BROAD_CH_CLEAR_CTRL_ADD 0x8008 |
Clear control channel broadcast register relative address. | |
#define | CVT_V1724_BROAD_CH_BLKSIZE_ADD 0x800C |
Block size channel broadcast register relative address. | |
#define | CVT_V1724_BROAD_CH_BLK_REM_NUM_ADD 0x8010 |
Number of Blocks to Remove channel broadcast register relative address. | |
#define | CVT_V1724_BROAD_CH_READ_CONF_ADD 0x8014 |
Parameters to Read Block channel broadcast register relative address. | |
#define | CVT_V1724_CONTROL_ADD 0x8104 |
Control register relative address. | |
#define | CVT_V1724_STATUS_ADD 0x8106 |
Status register relative address. | |
#define | CVT_V1724_INT_LEVEL_ADD 0x8108 |
Interrupt level register relative address. | |
#define | CVT_V1724_INT_VECTOR_ADD 0x810A |
Interrupt vector register relative address. | |
#define | CVT_V1724_GEO_ADDRESS_ADD 0x810C |
Geo Address register relative address. | |
#define | CVT_V1724_MCST_CBLT_ADDRESS_ADD 0x810E |
MCST/CBLT Address register relative address. | |
#define | CVT_V1724_MCST_CBLT_CTRL_ADD 0x8110 |
MCST/CBLT control register relative address. | |
#define | CVT_V1724_SW_RESET_ADD 0x8112 |
Software reset register relative address. | |
#define | CVT_V1724_SW_CLEAR_ADD 0x8114 |
Software clear register relative address. | |
#define | CVT_V1724_SW_TRIGGER_ADD 0x8116 |
Software trigger register relative address. | |
#define | CVT_V1724_TRIGGER_ENABLE_ADD 0x811C |
Trigger enable register relative address. | |
#define | CVT_V1724_BLT_EVENT_NUM_ADD 0x811E |
BLT event number register relative address. | |
#define | CVT_V1724_FW_REV_ADD 0x8120 |
Firmware Revision register relative address. | |
#define | CVT_V1724_TEST_REG_ADD 0x8124 |
Test register relative address. | |
#define | CVT_V1724_FLASH_EN_ADD 0x812C |
Flash enable relative address. | |
#define | CVT_V1724_FLASH_ADD 0x812E |
Flash relative address. | |
#define | CVT_V1724_DUMMY16_ADD 0x8130 |
Dummy 16 register relative address. | |
#define | CVT_V1724_DUMMY32_ADD 0x8132 |
Dummy 32 register relative address. | |
#define | CVT_V1724_POST_TRIG_ADD 0x8136 |
Post trigger register relative address. | |
#define | CVT_V1724_FRONT_PANEL_IO_ADD 0x813C |
Front panel IO register relative address. | |
#define | CVT_V1724_FRONT_PANEL_IO_CTRL_ADD 0x813E |
Front panel IO Control register relative address. | |
#define | CVT_V1724_CH0_THRESHOLD_ADD 0x1080 |
CH 0 Threshold register relative address. | |
#define | CVT_V1724_CH0_THR_SAMPLE_ADD 0x1084 |
CH 0 Over/Under Threshold Samples register relative address. | |
#define | CVT_V1724_CH0_STATUS_ADD 0x1088 |
CH 0 status register relative address. | |
#define | CVT_V1724_CH0_FW_REV_ADD 0x108C |
CH 0 firmware revision register relative address. | |
#define | CVT_V1724_CH0_READ_BLK_TRIG_ADD 0x1090 |
CH 0 Read Block Trigger register relative address. | |
#define | CVT_V1724_CH0_BLK_WRI_NUM_ADD 0x1094 |
CH 0 Number of Blocks Written register relative address. | |
#define | CVT_V1724_CH0_DAC_CONF_ADD 0x1098 |
CH 0 DAC Data Configuration register relative address. | |
#define | CVT_V1724_CH0_CONF_ADD 0x109C |
CH 0 Configuration register relative address. | |
#define | CVT_V1724_CH0_DEBUG_ADD 0x10A0 |
CH 0 Debug register relative address. | |
#define | CVT_V1724_CH1_THRESHOLD_ADD 0x1180 |
CH 1 Threshold register relative address. | |
#define | CVT_V1724_CH1_THR_SAMPLE_ADD 0x1184 |
CH 1 Over/Under Threshold Samples register relative address. | |
#define | CVT_V1724_CH1_STATUS_ADD 0x1188 |
CH 1 status register relative address. | |
#define | CVT_V1724_CH1_FW_REV_ADD 0x118C |
CH 1 firmware revision register relative address. | |
#define | CVT_V1724_CH1_READ_BLK_TRIG_ADD 0x1190 |
CH 1 Read Block Trigger register relative address. | |
#define | CVT_V1724_CH1_BLK_WRI_NUM_ADD 0x1194 |
CH 1 Number of Blocks Written register relative address. | |
#define | CVT_V1724_CH1_DAC_CONF_ADD 0x1198 |
CH 1 DAC Data Configuration register relative address. | |
#define | CVT_V1724_CH1_CONF_ADD 0x119C |
CH 1 Configuration register relative address. | |
#define | CVT_V1724_CH1_DEBUG_ADD 0x11A0 |
CH 1 Debug register relative address. | |
#define | CVT_V1724_CH2_THRESHOLD_ADD 0x1280 |
CH 2 Threshold register relative address. | |
#define | CVT_V1724_CH2_THR_SAMPLE_ADD 0x1284 |
CH 2 Over/Under Threshold Samples register relative address. | |
#define | CVT_V1724_CH2_STATUS_ADD 0x1288 |
CH 2 status register relative address. | |
#define | CVT_V1724_CH2_FW_REV_ADD 0x128C |
CH 2 firmware revision register relative address. | |
#define | CVT_V1724_CH2_READ_BLK_TRIG_ADD 0x1290 |
CH 2 Read Block Trigger register relative address. | |
#define | CVT_V1724_CH2_BLK_WRI_NUM_ADD 0x1294 |
CH 2 Number of Blocks Written register relative address. | |
#define | CVT_V1724_CH2_DAC_CONF_ADD 0x1298 |
CH 2 DAC Data Configuration register relative address. | |
#define | CVT_V1724_CH2_CONF_ADD 0x129C |
CH 2 Configuration register relative address. | |
#define | CVT_V1724_CH2_DEBUG_ADD 0x12A0 |
CH 2 Debug register relative address. | |
#define | CVT_V1724_CH3_THRESHOLD_ADD 0x1380 |
CH 3 Threshold register relative address. | |
#define | CVT_V1724_CH3_THR_SAMPLE_ADD 0x1384 |
CH 3 Over/Under Threshold Samples register relative address. | |
#define | CVT_V1724_CH3_STATUS_ADD 0x1388 |
CH 3 status register relative address. | |
#define | CVT_V1724_CH3_FW_REV_ADD 0x138C |
CH 3 firmware revision register relative address. | |
#define | CVT_V1724_CH3_READ_BLK_TRIG_ADD 0x1390 |
CH 3 Read Block Trigger register relative address. | |
#define | CVT_V1724_CH3_BLK_WRI_NUM_ADD 0x1394 |
CH 3 Number of Blocks Written register relative address. | |
#define | CVT_V1724_CH3_DAC_CONF_ADD 0x1398 |
CH 3 DAC Data Configuration register relative address. | |
#define | CVT_V1724_CH3_CONF_ADD 0x139C |
CH 3 Configuration register relative address. | |
#define | CVT_V1724_CH3_DEBUG_ADD 0x13A0 |
CH 3 Debug register relative address. | |
#define | CVT_V1724_CH4_THRESHOLD_ADD 0x1480 |
CH 4 Threshold register relative address. | |
#define | CVT_V1724_CH4_THR_SAMPLE_ADD 0x1484 |
CH 4 Over/Under Threshold Samples register relative address. | |
#define | CVT_V1724_CH4_STATUS_ADD 0x1488 |
CH 4 status register relative address. | |
#define | CVT_V1724_CH4_FW_REV_ADD 0x148C |
CH 4 firmware revision register relative address. | |
#define | CVT_V1724_CH4_READ_BLK_TRIG_ADD 0x1490 |
CH 4 Read Block Trigger register relative address. | |
#define | CVT_V1724_CH4_BLK_WRI_NUM_ADD 0x1494 |
CH 4 Number of Blocks Written register relative address. | |
#define | CVT_V1724_CH4_DAC_CONF_ADD 0x1498 |
CH 4 DAC Data Configuration register relative address. | |
#define | CVT_V1724_CH4_CONF_ADD 0x149C |
CH 4 Configuration register relative address. | |
#define | CVT_V1724_CH4_DEBUG_ADD 0x14A0 |
CH 4 Debug register relative address. | |
#define | CVT_V1724_CH5_THRESHOLD_ADD 0x1580 |
CH 5 Threshold register relative address. | |
#define | CVT_V1724_CH5_THR_SAMPLE_ADD 0x1584 |
CH 5 Over/Under Threshold Samples register relative address. | |
#define | CVT_V1724_CH5_STATUS_ADD 0x1588 |
CH 5 status register relative address. | |
#define | CVT_V1724_CH5_FW_REV_ADD 0x158C |
CH 5 firmware revision register relative address. | |
#define | CVT_V1724_CH5_READ_BLK_TRIG_ADD 0x1590 |
CH 5 Read Block Trigger register relative address. | |
#define | CVT_V1724_CH5_BLK_WRI_NUM_ADD 0x1594 |
CH 5 Number of Blocks Written register relative address. | |
#define | CVT_V1724_CH5_DAC_CONF_ADD 0x1598 |
CH 5 DAC Data Configuration register relative address. | |
#define | CVT_V1724_CH5_CONF_ADD 0x159C |
CH 5 Configuration register relative address. | |
#define | CVT_V1724_CH5_DEBUG_ADD 0x15A0 |
CH 5 Debug register relative address. | |
#define | CVT_V1724_CH6_THRESHOLD_ADD 0x1680 |
CH 6 Threshold register relative address. | |
#define | CVT_V1724_CH6_THR_SAMPLE_ADD 0x1684 |
CH 6 Over/Under Threshold Samples register relative address. | |
#define | CVT_V1724_CH6_STATUS_ADD 0x1688 |
CH 6 status register relative address. | |
#define | CVT_V1724_CH6_FW_REV_ADD 0x168C |
CH 6 firmware revision register relative address. | |
#define | CVT_V1724_CH6_READ_BLK_TRIG_ADD 0x1690 |
CH 6 Read Block Trigger register relative address. | |
#define | CVT_V1724_CH6_BLK_WRI_NUM_ADD 0x1694 |
CH 6 Number of Blocks Written register relative address. | |
#define | CVT_V1724_CH6_DAC_CONF_ADD 0x1698 |
CH 6 DAC Data Configuration register relative address. | |
#define | CVT_V1724_CH6_CONF_ADD 0x169C |
CH 6 Configuration register relative address. | |
#define | CVT_V1724_CH6_DEBUG_ADD 0x16A0 |
CH 6 Debug register relative address. | |
#define | CVT_V1724_CH7_THRESHOLD_ADD 0x1780 |
CH 7 Threshold register relative address. | |
#define | CVT_V1724_CH7_THR_SAMPLE_ADD 0x1784 |
CH 7 Over/Under Threshold Samples register relative address. | |
#define | CVT_V1724_CH7_STATUS_ADD 0x1788 |
CH 7 status register relative address. | |
#define | CVT_V1724_CH7_FW_REV_ADD 0x178C |
CH 7 firmware revision register relative address. | |
#define | CVT_V1724_CH7_READ_BLK_TRIG_ADD 0x1790 |
CH 7 Read Block Trigger register relative address. | |
#define | CVT_V1724_CH7_BLK_WRI_NUM_ADD 0x1794 |
CH 7 Number of Blocks Written register relative address. | |
#define | CVT_V1724_CH7_DAC_CONF_ADD 0x1798 |
CH 7 DAC Data Configuration register relative address. | |
#define | CVT_V1724_CH7_CONF_ADD 0x179C |
CH 7 Configuration register relative address. | |
#define | CVT_V1724_CH7_DEBUG_ADD 0x17A0 |
CH 7 Debug register relative address. | |
#define | CVT_V1724_BROAD_CH_CTRL_DATA_SIZE cvD32 |
Control channel broadcast register data size. | |
#define | CVT_V1724_BROAD_CH_SET_CTRL_DATA_SIZE cvD32 |
Set control channel broadcast register data size. | |
#define | CVT_V1724_BROAD_CH_CLEAR_CTRL_DATA_SIZE cvD32 |
Clear control channel broadcast register data size. | |
#define | CVT_V1724_BROAD_CH_BLKSIZE_DATA_SIZE cvD32 |
Block size channel broadcast register data size. | |
#define | CVT_V1724_BROAD_CH_BLK_REM_NUM_DATA_SIZE cvD32 |
Number of Blocks to Remove channel broadcast register data size. | |
#define | CVT_V1724_BROAD_CH_READ_CONF_DATA_SIZE cvD32 |
Parameters to Read Block channel broadcast register data size. | |
#define | CVT_V1724_CONTROL_DATA_SIZE cvD16 |
Control register data size. | |
#define | CVT_V1724_STATUS_DATA_SIZE cvD16 |
Status register data size. | |
#define | CVT_V1724_INT_LEVEL_DATA_SIZE cvD16 |
Interrupt level register data size. | |
#define | CVT_V1724_INT_VECTOR_DATA_SIZE cvD16 |
Interrupt vector register data size. | |
#define | CVT_V1724_GEO_ADDRESS_DATA_SIZE cvD16 |
Geo Address register data size. | |
#define | CVT_V1724_MCST_CBLT_ADDRESS_DATA_SIZE cvD16 |
MCST/CBLT Address register data size. | |
#define | CVT_V1724_MCST_CBLT_CTRL_DATA_SIZE cvD16 |
MCST/CBLT control register data size. | |
#define | CVT_V1724_SW_RESET_DATA_SIZE cvD16 |
Software reset register data size. | |
#define | CVT_V1724_SW_CLEAR_DATA_SIZE cvD16 |
Software clear register data size. | |
#define | CVT_V1724_SW_TRIGGER_DATA_SIZE cvD16 |
Software trigger register data size. | |
#define | CVT_V1724_TRIGGER_ENABLE_DATA_SIZE cvD16 |
Trigger enable register data size. | |
#define | CVT_V1724_BLT_EVENT_NUM_DATA_SIZE cvD16 |
BLT event number register data size. | |
#define | CVT_V1724_FW_REV_DATA_SIZE cvD32 |
Firmware Revision register data size. | |
#define | CVT_V1724_TEST_REG_DATA_SIZE cvD32 |
Test register data size. | |
#define | CVT_V1724_FLASH_EN_DATA_SIZE cvD16 |
Flash enable data size. | |
#define | CVT_V1724_FLASH_DATA_SIZE cvD16 |
Flash data size. | |
#define | CVT_V1724_DUMMY16_DATA_SIZE cvD16 |
Dummy 16 register data size. | |
#define | CVT_V1724_DUMMY32_DATA_SIZE cvD32 |
Dummy 32 register data size. | |
#define | CVT_V1724_POST_TRIG_DATA_SIZE cvD32 |
Post trigger register data size. | |
#define | CVT_V1724_FRONT_PANEL_IO_DATA_SIZE cvD16 |
Front panel IO register data size. | |
#define | CVT_V1724_FRONT_PANEL_IO_CTRL_DATA_SIZE cvD16 |
Front panel IO Control register data size. | |
#define | CVT_V1724_CH0_THRESHOLD_DATA_SIZE cvD32 |
CH 0 Threshold register relative data size. | |
#define | CVT_V1724_CH0_THR_SAMPLE_DATA_SIZE cvD32 |
CH 0 Over/Under Threshold Samples register relative data size. | |
#define | CVT_V1724_CH0_STATUS_DATA_SIZE cvD32 |
CH 0 status register relative data size. | |
#define | CVT_V1724_CH0_FW_REV_DATA_SIZE cvD32 |
CH 0 firmware revision register relative data size. | |
#define | CVT_V1724_CH0_READ_BLK_TRIG_DATA_SIZE cvD32 |
CH 0 Read Block Trigger register relative data size. | |
#define | CVT_V1724_CH0_BLK_WRI_NUM_DATA_SIZE cvD32 |
CH 0 Number of Blocks Written register relative data size. | |
#define | CVT_V1724_CH0_DAC_CONF_DATA_SIZE cvD32 |
CH 0 DAC Data Configuration register relative data size. | |
#define | CVT_V1724_CH0_CONF_DATA_SIZE cvD32 |
CH 0 Configuration register relative data size. | |
#define | CVT_V1724_CH0_DEBUG_DATA_SIZE cvD32 |
CH 0 Debug register relative data size. | |
#define | CVT_V1724_CH1_THRESHOLD_DATA_SIZE cvD32 |
CH 1 Threshold register relative data size. | |
#define | CVT_V1724_CH1_THR_SAMPLE_DATA_SIZE cvD32 |
CH 1 Over/Under Threshold Samples register relative data size. | |
#define | CVT_V1724_CH1_STATUS_DATA_SIZE cvD32 |
CH 1 status register relative data size. | |
#define | CVT_V1724_CH1_FW_REV_DATA_SIZE cvD32 |
CH 1 firmware revision register relative data size. | |
#define | CVT_V1724_CH1_READ_BLK_TRIG_DATA_SIZE cvD32 |
CH 1 Read Block Trigger register relative data size. | |
#define | CVT_V1724_CH1_BLK_WRI_NUM_DATA_SIZE cvD32 |
CH 1 Number of Blocks Written register relative data size. | |
#define | CVT_V1724_CH1_DAC_CONF_DATA_SIZE cvD32 |
CH 1 DAC Data Configuration register relative data size. | |
#define | CVT_V1724_CH1_CONF_DATA_SIZE cvD32 |
CH 1 Configuration register relative data size. | |
#define | CVT_V1724_CH1_DEBUG_DATA_SIZE cvD32 |
CH 1 Debug register relative data size. | |
#define | CVT_V1724_CH2_THRESHOLD_DATA_SIZE cvD32 |
CH 2 Threshold register relative data size. | |
#define | CVT_V1724_CH2_THR_SAMPLE_DATA_SIZE cvD32 |
CH 2 Over/Under Threshold Samples register relative data size. | |
#define | CVT_V1724_CH2_STATUS_DATA_SIZE cvD32 |
CH 2 status register relative data size. | |
#define | CVT_V1724_CH2_FW_REV_DATA_SIZE cvD32 |
CH 2 firmware revision register relative data size. | |
#define | CVT_V1724_CH2_READ_BLK_TRIG_DATA_SIZE cvD32 |
CH 2 Read Block Trigger register relative data size. | |
#define | CVT_V1724_CH2_BLK_WRI_NUM_DATA_SIZE cvD32 |
CH 2 Number of Blocks Written register relative data size. | |
#define | CVT_V1724_CH2_DAC_CONF_DATA_SIZE cvD32 |
CH 2 DAC Data Configuration register relative data size. | |
#define | CVT_V1724_CH2_CONF_DATA_SIZE cvD32 |
CH 2 Configuration register relative data size. | |
#define | CVT_V1724_CH2_DEBUG_DATA_SIZE cvD32 |
CH 2 Debug register relative data size. | |
#define | CVT_V1724_CH3_THRESHOLD_DATA_SIZE cvD32 |
CH 3 Threshold register relative data size. | |
#define | CVT_V1724_CH3_THR_SAMPLE_DATA_SIZE cvD32 |
CH 3 Over/Under Threshold Samples register relative data size. | |
#define | CVT_V1724_CH3_STATUS_DATA_SIZE cvD32 |
CH 3 status register relative data size. | |
#define | CVT_V1724_CH3_FW_REV_DATA_SIZE cvD32 |
CH 3 firmware revision register relative data size. | |
#define | CVT_V1724_CH3_READ_BLK_TRIG_DATA_SIZE cvD32 |
CH 3 Read Block Trigger register relative data size. | |
#define | CVT_V1724_CH3_BLK_WRI_NUM_DATA_SIZE cvD32 |
CH 3 Number of Blocks Written register relative data size. | |
#define | CVT_V1724_CH3_DAC_CONF_DATA_SIZE cvD32 |
CH 3 DAC Data Configuration register relative data size. | |
#define | CVT_V1724_CH3_CONF_DATA_SIZE cvD32 |
CH 3 Configuration register relative data size. | |
#define | CVT_V1724_CH3_DEBUG_DATA_SIZE cvD32 |
CH 3 Debug register relative data size. | |
#define | CVT_V1724_CH4_THRESHOLD_DATA_SIZE cvD32 |
CH 4 Threshold register relative data size. | |
#define | CVT_V1724_CH4_THR_SAMPLE_DATA_SIZE cvD32 |
CH 4 Over/Under Threshold Samples register relative data size. | |
#define | CVT_V1724_CH4_STATUS_DATA_SIZE cvD32 |
CH 4 status register relative data size. | |
#define | CVT_V1724_CH4_FW_REV_DATA_SIZE cvD32 |
CH 4 firmware revision register relative data size. | |
#define | CVT_V1724_CH4_READ_BLK_TRIG_DATA_SIZE cvD32 |
CH 4 Read Block Trigger register relative data size. | |
#define | CVT_V1724_CH4_BLK_WRI_NUM_DATA_SIZE cvD32 |
CH 4 Number of Blocks Written register relative data size. | |
#define | CVT_V1724_CH4_DAC_CONF_DATA_SIZE cvD32 |
CH 4 DAC Data Configuration register relative data size. | |
#define | CVT_V1724_CH4_CONF_DATA_SIZE cvD32 |
CH 4 Configuration register relative data size. | |
#define | CVT_V1724_CH4_DEBUG_DATA_SIZE cvD32 |
CH 4 Debug register relative data size. | |
#define | CVT_V1724_CH5_THRESHOLD_DATA_SIZE cvD32 |
CH 5 Threshold register relative data size. | |
#define | CVT_V1724_CH5_THR_SAMPLE_DATA_SIZE cvD32 |
CH 5 Over/Under Threshold Samples register relative data size. | |
#define | CVT_V1724_CH5_STATUS_DATA_SIZE cvD32 |
CH 5 status register relative data size. | |
#define | CVT_V1724_CH5_FW_REV_DATA_SIZE cvD32 |
CH 5 firmware revision register relative data size. | |
#define | CVT_V1724_CH5_READ_BLK_TRIG_DATA_SIZE cvD32 |
CH 5 Read Block Trigger register relative data size. | |
#define | CVT_V1724_CH5_BLK_WRI_NUM_DATA_SIZE cvD32 |
CH 5 Number of Blocks Written register relative data size. | |
#define | CVT_V1724_CH5_DAC_CONF_DATA_SIZE cvD32 |
CH 5 DAC Data Configuration register relative data size. | |
#define | CVT_V1724_CH5_CONF_DATA_SIZE cvD32 |
CH 5 Configuration register relative data size. | |
#define | CVT_V1724_CH5_DEBUG_DATA_SIZE cvD32 |
CH 5 Debug register relative data size. | |
#define | CVT_V1724_CH6_THRESHOLD_DATA_SIZE cvD32 |
CH 6 Threshold register relative data size. | |
#define | CVT_V1724_CH6_THR_SAMPLE_DATA_SIZE cvD32 |
CH 6 Over/Under Threshold Samples register relative data size. | |
#define | CVT_V1724_CH6_STATUS_DATA_SIZE cvD32 |
CH 6 status register relative data size. | |
#define | CVT_V1724_CH6_FW_REV_DATA_SIZE cvD32 |
CH 6 firmware revision register relative data size. | |
#define | CVT_V1724_CH6_READ_BLK_TRIG_DATA_SIZE cvD32 |
CH 6 Read Block Trigger register relative data size. | |
#define | CVT_V1724_CH6_BLK_WRI_NUM_DATA_SIZE cvD32 |
CH 6 Number of Blocks Written register relative data size. | |
#define | CVT_V1724_CH6_DAC_CONF_DATA_SIZE cvD32 |
CH 6 DAC Data Configuration register relative data size. | |
#define | CVT_V1724_CH6_CONF_DATA_SIZE cvD32 |
CH 6 Configuration register relative data size. | |
#define | CVT_V1724_CH6_DEBUG_DATA_SIZE cvD32 |
CH 6 Debug register relative data size. | |
#define | CVT_V1724_CH7_THRESHOLD_DATA_SIZE cvD32 |
CH 7 Threshold register relative data size. | |
#define | CVT_V1724_CH7_THR_SAMPLE_DATA_SIZE cvD32 |
CH 7 Over/Under Threshold Samples register relative data size. | |
#define | CVT_V1724_CH7_STATUS_DATA_SIZE cvD32 |
CH 7 status register relative data size. | |
#define | CVT_V1724_CH7_FW_REV_DATA_SIZE cvD32 |
CH 7 firmware revision register relative data size. | |
#define | CVT_V1724_CH7_READ_BLK_TRIG_DATA_SIZE cvD32 |
CH 7 Read Block Trigger register relative data size. | |
#define | CVT_V1724_CH7_BLK_WRI_NUM_DATA_SIZE cvD32 |
CH 7 Number of Blocks Written register relative data size. | |
#define | CVT_V1724_CH7_DAC_CONF_DATA_SIZE cvD32 |
CH 7 DAC Data Configuration register relative data size. | |
#define | CVT_V1724_CH7_CONF_DATA_SIZE cvD32 |
CH 7 Configuration register relative data size. | |
#define | CVT_V1724_CH7_DEBUG_DATA_SIZE cvD32 |
CH 7 Debug register relative data size. | |
#define | CVT_V1724_BROAD_CH_CTRL_AM cvA32_S_DATA |
Control channel broadcast register address modifier. | |
#define | CVT_V1724_BROAD_CH_SET_CTRL_AM cvA32_S_DATA |
Set control channel broadcast register address modifier. | |
#define | CVT_V1724_BROAD_CH_CLEAR_CTRL_AM cvA32_S_DATA |
Clear control channel broadcast register address modifier. | |
#define | CVT_V1724_BROAD_CH_BLKSIZE_AM cvA32_S_DATA |
Block size channel broadcast register address modifier. | |
#define | CVT_V1724_BROAD_CH_BLK_REM_NUM_AM cvA32_S_DATA |
Number of Blocks to Remove channel broadcast register address modifier. | |
#define | CVT_V1724_BROAD_CH_READ_CONF_AM cvA32_S_DATA |
Parameters to Read Block channel broadcast register address modifier. | |
#define | CVT_V1724_CONTROL_AM cvA32_S_DATA |
Control register address modifier. | |
#define | CVT_V1724_STATUS_AM cvA32_S_DATA |
Status register address modifier. | |
#define | CVT_V1724_INT_LEVEL_AM cvA32_S_DATA |
Interrupt level register address modifier. | |
#define | CVT_V1724_INT_VECTOR_AM cvA32_S_DATA |
Interrupt vector register address modifier. | |
#define | CVT_V1724_GEO_ADDRESS_AM cvA32_S_DATA |
Geo Address register address modifier. | |
#define | CVT_V1724_MCST_CBLT_ADDRESS_AM cvA32_S_DATA |
MCST/CBLT Address register address modifier. | |
#define | CVT_V1724_MCST_CBLT_CTRL_AM cvA32_S_DATA |
MCST/CBLT control register address modifier. | |
#define | CVT_V1724_SW_RESET_AM cvA32_S_DATA |
Software reset register address modifier. | |
#define | CVT_V1724_SW_CLEAR_AM cvA32_S_DATA |
Software clear register address modifier. | |
#define | CVT_V1724_SW_TRIGGER_AM cvA32_S_DATA |
Software trigger register address modifier. | |
#define | CVT_V1724_TRIGGER_ENABLE_AM cvA32_S_DATA |
Trigger enable register address modifier. | |
#define | CVT_V1724_BLT_EVENT_NUM_AM cvA32_S_DATA |
BLT event number register address modifier. | |
#define | CVT_V1724_FW_REV_AM cvA32_S_DATA |
Firmware Revision register address modifier. | |
#define | CVT_V1724_TEST_REG_AM cvA32_S_DATA |
Test register address modifier. | |
#define | CVT_V1724_FLASH_EN_AM cvA32_S_DATA |
Flash enable address modifier. | |
#define | CVT_V1724_FLASH_AM cvA32_S_DATA |
Flash address modifier. | |
#define | CVT_V1724_DUMMY16_AM cvA32_S_DATA |
Dummy 16 register address modifier. | |
#define | CVT_V1724_DUMMY32_AM cvA32_S_DATA |
Dummy 32 register address modifier. | |
#define | CVT_V1724_POST_TRIG_AM cvA32_S_DATA |
Post trigger register address modifier. | |
#define | CVT_V1724_FRONT_PANEL_IO_AM cvA32_S_DATA |
Front panel IO register address modifier. | |
#define | CVT_V1724_FRONT_PANEL_IO_CTRL_AM cvA32_S_DATA |
Front panel IO Control register address modifier. | |
#define | CVT_V1724_CH0_THRESHOLD_AM cvA32_S_DATA |
CH 0 Threshold register relative address modifier. | |
#define | CVT_V1724_CH0_THR_SAMPLE_AM cvA32_S_DATA |
CH 0 Over/Under Threshold Samples register relative address modifier. | |
#define | CVT_V1724_CH0_STATUS_AM cvA32_S_DATA |
CH 0 status register relative address modifier. | |
#define | CVT_V1724_CH0_FW_REV_AM cvA32_S_DATA |
CH 0 firmware revision register relative address modifier. | |
#define | CVT_V1724_CH0_READ_BLK_TRIG_AM cvA32_S_BLT |
CH 0 Read Block Trigger register relative address modifier. | |
#define | CVT_V1724_CH0_BLK_WRI_NUM_AM cvA32_S_DATA |
CH 0 Number of Blocks Written register relative address modifier. | |
#define | CVT_V1724_CH0_DAC_CONF_AM cvA32_S_DATA |
CH 0 DAC Data Configuration register relative address modifier. | |
#define | CVT_V1724_CH0_CONF_AM cvA32_S_DATA |
CH 0 Configuration register relative address modifier. | |
#define | CVT_V1724_CH0_DEBUG_AM cvA32_S_DATA |
CH 0 Debug register relative address modifier. | |
#define | CVT_V1724_CH1_THRESHOLD_AM cvA32_S_DATA |
CH 1 Threshold register relative address modifier. | |
#define | CVT_V1724_CH1_THR_SAMPLE_AM cvA32_S_DATA |
CH 1 Over/Under Threshold Samples register relative address modifier. | |
#define | CVT_V1724_CH1_STATUS_AM cvA32_S_DATA |
CH 1 status register relative address modifier. | |
#define | CVT_V1724_CH1_FW_REV_AM cvA32_S_DATA |
CH 1 firmware revision register relative address modifier. | |
#define | CVT_V1724_CH1_READ_BLK_TRIG_AM cvA32_S_BLT |
CH 1 Read Block Trigger register relative address modifier. | |
#define | CVT_V1724_CH1_BLK_WRI_NUM_AM cvA32_S_DATA |
CH 1 Number of Blocks Written register relative address modifier. | |
#define | CVT_V1724_CH1_DAC_CONF_AM cvA32_S_DATA |
CH 1 DAC Data Configuration register relative address modifier. | |
#define | CVT_V1724_CH1_CONF_AM cvA32_S_DATA |
CH 1 Configuration register relative address modifier. | |
#define | CVT_V1724_CH1_DEBUG_AM cvA32_S_DATA |
CH 1 Debug register relative address modifier. | |
#define | CVT_V1724_CH2_THRESHOLD_AM cvA32_S_DATA |
CH 2 Threshold register relative address modifier. | |
#define | CVT_V1724_CH2_THR_SAMPLE_AM cvA32_S_DATA |
CH 2 Over/Under Threshold Samples register relative address modifier. | |
#define | CVT_V1724_CH2_STATUS_AM cvA32_S_DATA |
CH 2 status register relative address modifier. | |
#define | CVT_V1724_CH2_FW_REV_AM cvA32_S_DATA |
CH 2 firmware revision register relative address modifier. | |
#define | CVT_V1724_CH2_READ_BLK_TRIG_AM cvA32_S_BLT |
CH 2 Read Block Trigger register relative address modifier. | |
#define | CVT_V1724_CH2_BLK_WRI_NUM_AM cvA32_S_DATA |
CH 2 Number of Blocks Written register relative address modifier. | |
#define | CVT_V1724_CH2_DAC_CONF_AM cvA32_S_DATA |
CH 2 DAC Data Configuration register relative address modifier. | |
#define | CVT_V1724_CH2_CONF_AM cvA32_S_DATA |
CH 2 Configuration register relative address modifier. | |
#define | CVT_V1724_CH2_DEBUG_AM cvA32_S_DATA |
CH 2 Debug register relative address modifier. | |
#define | CVT_V1724_CH3_THRESHOLD_AM cvA32_S_DATA |
CH 3 Threshold register relative address modifier. | |
#define | CVT_V1724_CH3_THR_SAMPLE_AM cvA32_S_DATA |
CH 3 Over/Under Threshold Samples register relative address modifier. | |
#define | CVT_V1724_CH3_STATUS_AM cvA32_S_DATA |
CH 3 status register relative address modifier. | |
#define | CVT_V1724_CH3_FW_REV_AM cvA32_S_DATA |
CH 3 firmware revision register relative address modifier. | |
#define | CVT_V1724_CH3_READ_BLK_TRIG_AM cvA32_S_BLT |
CH 3 Read Block Trigger register relative address modifier. | |
#define | CVT_V1724_CH3_BLK_WRI_NUM_AM cvA32_S_DATA |
CH 3 Number of Blocks Written register relative address modifier. | |
#define | CVT_V1724_CH3_DAC_CONF_AM cvA32_S_DATA |
CH 3 DAC Data Configuration register relative address modifier. | |
#define | CVT_V1724_CH3_CONF_AM cvA32_S_DATA |
CH 3 Configuration register relative address modifier. | |
#define | CVT_V1724_CH3_DEBUG_AM cvA32_S_DATA |
CH 3 Debug register relative address modifier. | |
#define | CVT_V1724_CH4_THRESHOLD_AM cvA32_S_DATA |
CH 4 Threshold register relative address modifier. | |
#define | CVT_V1724_CH4_THR_SAMPLE_AM cvA32_S_DATA |
CH 4 Over/Under Threshold Samples register relative address modifier. | |
#define | CVT_V1724_CH4_STATUS_AM cvA32_S_DATA |
CH 4 status register relative address modifier. | |
#define | CVT_V1724_CH4_FW_REV_AM cvA32_S_DATA |
CH 4 firmware revision register relative address modifier. | |
#define | CVT_V1724_CH4_READ_BLK_TRIG_AM cvA32_S_BLT |
CH 4 Read Block Trigger register relative address modifier. | |
#define | CVT_V1724_CH4_BLK_WRI_NUM_AM cvA32_S_DATA |
CH 4 Number of Blocks Written register relative address modifier. | |
#define | CVT_V1724_CH4_DAC_CONF_AM cvA32_S_DATA |
CH 4 DAC Data Configuration register relative address modifier. | |
#define | CVT_V1724_CH4_CONF_AM cvA32_S_DATA |
CH 4 Configuration register relative address modifier. | |
#define | CVT_V1724_CH4_DEBUG_AM cvA32_S_DATA |
CH 4 Debug register relative address modifier. | |
#define | CVT_V1724_CH5_THRESHOLD_AM cvA32_S_DATA |
CH 5 Threshold register relative address modifier. | |
#define | CVT_V1724_CH5_THR_SAMPLE_AM cvA32_S_DATA |
CH 5 Over/Under Threshold Samples register relative address modifier. | |
#define | CVT_V1724_CH5_STATUS_AM cvA32_S_DATA |
CH 5 status register relative address modifier. | |
#define | CVT_V1724_CH5_FW_REV_AM cvA32_S_DATA |
CH 5 firmware revision register relative address modifier. | |
#define | CVT_V1724_CH5_READ_BLK_TRIG_AM cvA32_S_BLT |
CH 5 Read Block Trigger register relative address modifier. | |
#define | CVT_V1724_CH5_BLK_WRI_NUM_AM cvA32_S_DATA |
CH 5 Number of Blocks Written register relative address modifier. | |
#define | CVT_V1724_CH5_DAC_CONF_AM cvA32_S_DATA |
CH 5 DAC Data Configuration register relative address modifier. | |
#define | CVT_V1724_CH5_CONF_AM cvA32_S_DATA |
CH 5 Configuration register relative address modifier. | |
#define | CVT_V1724_CH5_DEBUG_AM cvA32_S_DATA |
CH 5 Debug register relative address modifier. | |
#define | CVT_V1724_CH6_THRESHOLD_AM cvA32_S_DATA |
CH 6 Threshold register relative address modifier. | |
#define | CVT_V1724_CH6_THR_SAMPLE_AM cvA32_S_DATA |
CH 6 Over/Under Threshold Samples register relative address modifier. | |
#define | CVT_V1724_CH6_STATUS_AM cvA32_S_DATA |
CH 6 status register relative address modifier. | |
#define | CVT_V1724_CH6_FW_REV_AM cvA32_S_DATA |
CH 6 firmware revision register relative address modifier. | |
#define | CVT_V1724_CH6_READ_BLK_TRIG_AM cvA32_S_BLT |
CH 6 Read Block Trigger register relative address modifier. | |
#define | CVT_V1724_CH6_BLK_WRI_NUM_AM cvA32_S_DATA |
CH 6 Number of Blocks Written register relative address modifier. | |
#define | CVT_V1724_CH6_DAC_CONF_AM cvA32_S_DATA |
CH 6 DAC Data Configuration register relative address modifier. | |
#define | CVT_V1724_CH6_CONF_AM cvA32_S_DATA |
CH 6 Configuration register relative address modifier. | |
#define | CVT_V1724_CH6_DEBUG_AM cvA32_S_DATA |
CH 6 Debug register relative address modifier. | |
#define | CVT_V1724_CH7_THRESHOLD_AM cvA32_S_DATA |
CH 7 Threshold register relative address modifier. | |
#define | CVT_V1724_CH7_THR_SAMPLE_AM cvA32_S_DATA |
CH 7 Over/Under Threshold Samples register relative address modifier. | |
#define | CVT_V1724_CH7_STATUS_AM cvA32_S_DATA |
CH 7 status register relative address modifier. | |
#define | CVT_V1724_CH7_FW_REV_AM cvA32_S_DATA |
CH 7 firmware revision register relative address modifier. | |
#define | CVT_V1724_CH7_READ_BLK_TRIG_AM cvA32_S_BLT |
CH 7 Read Block Trigger register relative address modifier. | |
#define | CVT_V1724_CH7_BLK_WRI_NUM_AM cvA32_S_DATA |
CH 7 Number of Blocks Written register relative address modifier. | |
#define | CVT_V1724_CH7_DAC_CONF_AM cvA32_S_DATA |
CH 7 DAC Data Configuration register relative address modifier. | |
#define | CVT_V1724_CH7_CONF_AM cvA32_S_DATA |
CH 7 Configuration register relative address modifier. | |
#define | CVT_V1724_CH7_DEBUG_AM cvA32_S_DATA |
CH 7 Debug register relative address modifier. | |
#define | CVT_V1724_MAX_CHANNEL 8 |
The number of channels. | |
#define | CVT_V1724_GET_CH_READ_CONF_BLOCK_ADD(reg) (((UINT32)reg)& CVT_V1724_CHRDC_BLOCK_ADD_MSK) |
Extract the Address of Block to be read from UINT32 value. | |
#define | CVT_V1724_SET_CH_READ_CONF_BLOCK_ADD(reg, value) reg= (((UINT32)reg)& ~CVT_V1724_CHRDC_BLOCK_ADD_MSK)| ((UINT32)value& CVT_V1724_CHRDC_BLOCK_ADD_MSK) |
Sets the Address of Block to be read into UINT32 value. | |
#define | CVT_V1724_GET_CH_READ_CONF_SAMPLE_NUM(reg) ((((UINT32)reg)& CVT_V1724_CHRDC_SAMPLE_NUM_MSK)>> 12) |
Extract the Number of samples to be read from UINT32 value. | |
#define | CVT_V1724_SET_CH_READ_CONF_SAMPLE_NUM(reg, value) reg= (((UINT32)reg)& ~CVT_V1724_CHRDC_SAMPLE_NUM_MSK)| ((((UINT32)value)<< 12)& CVT_V1724_CHRDC_SAMPLE_NUM_MSK) |
Sets the Number of samples to be read into UINT32 value. | |
#define | CVT_V1724_GET_CH_READ_CONF_OFFSET(reg) ((((UINT32)reg)& CVT_V1724_CHRDC_OFFSET_MSK)>> 22) |
Extract the Offset of Address Data from UINT32 value. | |
#define | CVT_V1724_SET_CH_READ_CONF_OFFSET(reg, value) reg= (((UINT32)reg)& ~CVT_V1724_CHRDC_OFFSET_MSK)| ((((UINT32)value)<< 22)& CVT_V1724_CHRDC_OFFSET_MSK) |
Sets the Offset of Address Data into UINT32 value. | |
#define | CVT_V1724_GET_CH_DAC_CONF(reg) (((UINT32)reg)& CVT_V1724_CHDAC_DATA_MSK) |
Extract DAC's data from UINT32 value. | |
#define | CVT_V1724_SET_CH_DAC_CONF(reg, value) reg= (((UINT32)reg)& ~CVT_V1724_CHDAC_DATA_MSK)| ((UINT32)value& CVT_V1724_CHDAC_DATA_MSK) |
Sets DAC's data into UINT32 value. | |
Enumerations | |
enum | CVT_V792_REG_INDEX { CVT_V1724_BROAD_CH_CTRL_INDEX, CVT_V1724_BROAD_CH_SET_CTRL_INDEX, CVT_V1724_BROAD_CH_CLEAR_CTRL_INDEX, CVT_V1724_BROAD_CH_BLKSIZE_INDEX, CVT_V1724_BROAD_CH_BLK_REM_NUM_INDEX, CVT_V1724_BROAD_CH_READ_CONF_INDEX, CVT_V1724_CONTROL_INDEX, CVT_V1724_STATUS_INDEX, CVT_V1724_INT_LEVEL_INDEX, CVT_V1724_INT_VECTOR_INDEX, CVT_V1724_GEO_ADDRESS_INDEX, CVT_V1724_MCST_CBLT_ADDRESS_INDEX, CVT_V1724_MCST_CBLT_CTRL_INDEX, CVT_V1724_SW_RESET_INDEX, CVT_V1724_SW_CLEAR_INDEX, CVT_V1724_SW_TRIGGER_INDEX, CVT_V1724_TRIGGER_ENABLE_INDEX, CVT_V1724_BLT_EVENT_NUM_INDEX, CVT_V1724_FW_REV_INDEX, CVT_V1724_TEST_REG_INDEX, CVT_V1724_FLASH_EN_INDEX, CVT_V1724_FLASH_INDEX, CVT_V1724_DUMMY16_INDEX, CVT_V1724_DUMMY32_INDEX, CVT_V1724_POST_TRIG_INDEX, CVT_V1724_FRONT_PANEL_IO_INDEX, CVT_V1724_FRONT_PANEL_IO_CTRL_INDEX, CVT_V1724_CH0_THRESHOLD_INDEX, CVT_V1724_CH0_THR_SAMPLE_INDEX, CVT_V1724_CH0_STATUS_INDEX, CVT_V1724_CH0_FW_REV_INDEX, CVT_V1724_CH0_READ_BLK_TRIG_INDEX, CVT_V1724_CH0_BLK_WRI_NUM_INDEX, CVT_V1724_CH0_DAC_CONF_INDEX, CVT_V1724_CH0_CONF_INDEX, CVT_V1724_CH0_DEBUG_INDEX, CVT_V1724_CH1_THRESHOLD_INDEX, CVT_V1724_CH1_THR_SAMPLE_INDEX, CVT_V1724_CH1_STATUS_INDEX, CVT_V1724_CH1_FW_REV_INDEX, CVT_V1724_CH1_READ_BLK_TRIG_INDEX, CVT_V1724_CH1_BLK_WRI_NUM_INDEX, CVT_V1724_CH1_DAC_CONF_INDEX, CVT_V1724_CH1_CONF_INDEX, CVT_V1724_CH1_DEBUG_INDEX, CVT_V1724_CH2_THRESHOLD_INDEX, CVT_V1724_CH2_THR_SAMPLE_INDEX, CVT_V1724_CH2_STATUS_INDEX, CVT_V1724_CH2_FW_REV_INDEX, CVT_V1724_CH2_READ_BLK_TRIG_INDEX, CVT_V1724_CH2_BLK_WRI_NUM_INDEX, CVT_V1724_CH2_DAC_CONF_INDEX, CVT_V1724_CH2_CONF_INDEX, CVT_V1724_CH2_DEBUG_INDEX, CVT_V1724_CH3_THRESHOLD_INDEX, CVT_V1724_CH3_THR_SAMPLE_INDEX, CVT_V1724_CH3_STATUS_INDEX, CVT_V1724_CH3_FW_REV_INDEX, CVT_V1724_CH3_READ_BLK_TRIG_INDEX, CVT_V1724_CH3_BLK_WRI_NUM_INDEX, CVT_V1724_CH3_DAC_CONF_INDEX, CVT_V1724_CH3_CONF_INDEX, CVT_V1724_CH3_DEBUG_INDEX, CVT_V1724_CH4_THRESHOLD_INDEX, CVT_V1724_CH4_THR_SAMPLE_INDEX, CVT_V1724_CH4_STATUS_INDEX, CVT_V1724_CH4_FW_REV_INDEX, CVT_V1724_CH4_READ_BLK_TRIG_INDEX, CVT_V1724_CH4_BLK_WRI_NUM_INDEX, CVT_V1724_CH4_DAC_CONF_INDEX, CVT_V1724_CH4_CONF_INDEX, CVT_V1724_CH4_DEBUG_INDEX, CVT_V1724_CH5_THRESHOLD_INDEX, CVT_V1724_CH5_THR_SAMPLE_INDEX, CVT_V1724_CH5_STATUS_INDEX, CVT_V1724_CH5_FW_REV_INDEX, CVT_V1724_CH5_READ_BLK_TRIG_INDEX, CVT_V1724_CH5_BLK_WRI_NUM_INDEX, CVT_V1724_CH5_DAC_CONF_INDEX, CVT_V1724_CH5_CONF_INDEX, CVT_V1724_CH5_DEBUG_INDEX, CVT_V1724_CH6_THRESHOLD_INDEX, CVT_V1724_CH6_THR_SAMPLE_INDEX, CVT_V1724_CH6_STATUS_INDEX, CVT_V1724_CH6_FW_REV_INDEX, CVT_V1724_CH6_READ_BLK_TRIG_INDEX, CVT_V1724_CH6_BLK_WRI_NUM_INDEX, CVT_V1724_CH6_DAC_CONF_INDEX, CVT_V1724_CH6_CONF_INDEX, CVT_V1724_CH6_DEBUG_INDEX, CVT_V1724_CH7_THRESHOLD_INDEX, CVT_V1724_CH7_THR_SAMPLE_INDEX, CVT_V1724_CH7_STATUS_INDEX, CVT_V1724_CH7_FW_REV_INDEX, CVT_V1724_CH7_READ_BLK_TRIG_INDEX, CVT_V1724_CH7_BLK_WRI_NUM_INDEX, CVT_V1724_CH7_DAC_CONF_INDEX, CVT_V1724_CH7_CONF_INDEX, CVT_V1724_CH7_DEBUG_INDEX } |
The registers indexes. More... | |
enum | CVT_V1724_CONTROL_MSK { CVT_V1724_CTRL_SWITCH_CLKEN_MSK = 0x0001, CVT_V1724_CTRL_FREQ_SEL_MSK = 0x0002, CVT_V1724_CTRL_BERR_ENABLE_MSK = 0x0010 } |
Control register bitmasks. More... | |
enum | CVT_V1724_STATUS_MSK { CVT_V1724_STS_FREE_MSK = 0x0001 } |
Status register bitmasks. More... | |
enum | CVT_V1724_TRIGGER_ENABLE_MSK { CVT_V1724_TRGEN_CH0_MSK = 0x0001, CVT_V1724_TRGEN_CH1_MSK = 0x0002, CVT_V1724_TRGEN_CH2_MSK = 0x0008, CVT_V1724_TRGEN_CH3_MSK = 0x0010, CVT_V1724_TRGEN_CH4_MSK = 0x0040, CVT_V1724_TRGEN_CH5_MSK = 0x0080, CVT_V1724_TRGEN_CH6_MSK = 0x0200, CVT_V1724_TRGEN_CH7_MSK = 0x0400, CVT_V1724_TRGEN_ENABLE_MSK = 0x2000, CVT_V1724_TRGEN_EXT_MSK = 0x4000, CVT_V1724_TRGEN_SW_MSK = 0x8000 } |
Trigger enable bitmasks. More... | |
enum | CVT_V1724_CH_CONTROL_MSK { CVT_V1724_CHCTRL_SAMPLE_ACQ_MSK = 0x00000001, CVT_V1724_CHCTRL_TRG_OVERLAP_MSK = 0x00000002, CVT_V1724_CHCTRL_MEM_ENABLE_MSK = 0x00000004, CVT_V1724_CHCTRL_MEM_TEST_MSK = 0x00000008, CVT_V1724_CHCTRL_MEM_RANDOM_ACC_MSK = 0x00000010, CVT_V1724_CHCTRL_TRG_IN_EN_MSK = 0x00000020, CVT_V1724_CHCTRL_TRG_OUT_UNDER_EN_MSK = 0x00000040, CVT_V1724_CHCTRL_TRG_OUT_EN_MSK = 0x00000080, CVT_V1724_CHCTRL_BIST_TEST_MSK = 0x00000100, CVT_V1724_CHCTRL_READ_MEM_MSK = 0x00000200 } |
CH Control register bitmasks. More... | |
enum | CVT_V1724_CH_READ_CONF_MSK { CVT_V1724_CHRDC_BLOCK_ADD_MSK = 0x00000FFF, CVT_V1724_CHRDC_SAMPLE_NUM_MSK = 0x003FF000, CVT_V1724_CHRDC_OFFSET_MSK = 0xFFC00000 } |
CH Read configuration register bitmasks. More... | |
enum | CVT_V1724_CH_CONF_MSK { CVT_V1724_CHCONF_DITHER_MSK = 0x00000001, CVT_V1724_CHCONF_OUTPUT_MODE_MSK = 0x00000002, CVT_V1724_CHCONF_RND_MSK = 0x00000004 } |
CH Configuration register bitmasks. More... | |
enum | CVT_V1724_DAC_CONF_MSK { CVT_V1724_CHDAC_DATA_MSK = 0x0000FFFF, CVT_V1724_CHDAC_SET_A_MSK = 0x00100000, CVT_V1724_CHDAC_SET_B_MSK = 0x00240000 } |
CH DAC data configuration register bitmasks. More... | |
enum | CVT_V1724_CH_STATUS_MSK { CVT_V1724_CHSTS_FIFO_FULL_MSK = 0x00000001, CVT_V1724_CHSTS_FIFO_EMPTY_MSK = 0x00000002, CVT_V1724_CHSTS_DAC_BUSY_MSK = 0x00000004, CVT_V1724_CHSTS_BIST_END_MSK = 0x00000008, CVT_V1724_CHSTS_BIST_OK_MSK = 0x00000010, CVT_V1724_CHSTS_BLOCK_REM_OK_MSK = 0x00000020 } |
CH status register bitmasks. More... | |
enum | CVT_V1724_CH_BLKSIZE { CVT_V1724_CHBKSZ_512K = 0, CVT_V1724_CHBKSZ_256K, CVT_V1724_CHBKSZ_128K, CVT_V1724_CHBKSZ_64K, CVT_V1724_CHBKSZ_32K, CVT_V1724_CHBKSZ_16K, CVT_V1724_CHBKSZ_8K, CVT_V1724_CHBKSZ_4K, CVT_V1724_CHBKSZ_2K, CVT_V1724_CHBKSZ_1K, CVT_V1724_CHBKSZ_512 } |
The channel Samples' Number for each block. More... | |
enum | CVT_V1724_MCST_CBLT_CTRL_MSK { CVT_V1724_MCCTRL_DISABLED_BOARD_MSK = 0x0000, CVT_V1724_MCCTRL_LAST_BOARD_MSK = 0x0001, CVT_V1724_MCCTRL_FIRST_BOARD_MSK = 0x0002, CVT_V1724_MCCTRL_MID_BOARD_MSK = 0x0003 } |
V1724 CVT_V1724/MCST Control register bit masks. More... | |
Functions | |
BOOL | cvt_V1724_open (cvt_V1724_data *p_data, UINT16 base_address, long vme_handle) |
V1724 VME boards data initialization. | |
BOOL | cvt_V1724_close (cvt_V1724_data *p_data) |
V1724 VME boards closing and resource free. | |
BOOL | cvt_V1724_read_buffer (cvt_V1724_data *p_data, UINT8 ch_index, UINT16 *p_buff, UINT32 *p_buff_size) |
CH 0 Read Block Trigger register index CH 1 Read Block Trigger register index CH 2 Read Block Trigger register index CH 3 Read Block Trigger register index CH 4 Read Block Trigger register index CH 5 Read Block Trigger register index CH 6 Read Block Trigger register index CH 7 Read Block Trigger register index CH 0 Number of Blocks Written register index CH 1 Number of Blocks Written register index CH 2 Number of Blocks Written register index CH 3 Number of Blocks Written register index CH 4 Number of Blocks Written register index CH 5 Number of Blocks Written register index CH 6 Number of Blocks Written register index CH 7 Number of Blocks Written register index. | |
BOOL | cvt_V1724_set_trigger_mode (cvt_V1724_data *p_data, BOOL falling_edge_enable, BOOL trigger_in_enable, BOOL trigger_out_enable, BOOL ext_trigger_enable, BOOL sw_trigger_enable, UINT8 ch_trigger_enable_msk, BOOL trigger_overlap_enable, UINT32 post_trigger) |
Setups the triggering mode parameters. | |
BOOL | cvt_V1724_set_acquisition_mode (cvt_V1724_data *p_data, BOOL sample_enable, CVT_V1724_CH_BLKSIZE block_size) |
Setups the acquisition mode parameters. | |
BOOL | cvt_V1724_set_dither_enable (cvt_V1724_data *p_data, UINT8 ch_msk, BOOL dither_value) |
CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index. | |
BOOL | cvt_V1724_set_interrupt (cvt_V1724_data *p_data, UINT8 level, UINT8 vector, UINT8 event_number) |
Setups interrupt parameters. | |
BOOL | cvt_V1724_set_readout_mode (cvt_V1724_data *p_data, BOOL enable_bus_error, UINT16 BLT_event_number) |
Setups data readout mode parameters. | |
BOOL | cvt_V1724_software_reset (cvt_V1724_data *p_data) |
Performs a software reset. | |
BOOL | cvt_V1724_data_clear (cvt_V1724_data *p_data) |
Performs a data clear. | |
BOOL | cvt_V1724_set_channel_offset (cvt_V1724_data *p_data, UINT8 ch_msk, UINT16 offset_value) |
CH 0 DAC Data Configuration register index CH 1 DAC Data Configuration register index CH 2 DAC Data Configuration register index CH 3 DAC Data Configuration register index CH 4 DAC Data Configuration register index CH 5 DAC Data Configuration register index CH 6 DAC Data Configuration register index CH 7 DAC Data Configuration register index. | |
BOOL | cvt_V1724_set_channel_trigger (cvt_V1724_data *p_data, UINT8 ch_msk, UINT32 trigger_threshold, UINT32 threshold_samples) |
CH 0 Threshold register index CH 1 Threshold register index CH 2 Threshold register index CH 3 Threshold register index CH 4 Threshold register index CH 5 Threshold register index CH 6 Threshold register index CH 7 Threshold register index CH 0 Over/Under Threshold Samples register index CH 1 Over/Under Threshold Samples register index CH 2 Over/Under Threshold Samples register index CH 3 Over/Under Threshold Samples register index CH 4 Over/Under Threshold Samples register index CH 5 Over/Under Threshold Samples register index CH 6 Over/Under Threshold Samples register index CH 7 Over/Under Threshold Samples register index. | |
BOOL | cvt_V1724_software_trigger (cvt_V1724_data *p_data) |
Performs a software trigger. | |
BOOL | cvt_V1724_get_channel_status (cvt_V1724_data *p_data, UINT8 ch_index, BOOL *p_is_dac_busy, BOOL *p_is_fifo_full, BOOL *p_is_fifo_almost_full, BOOL *p_is_block_remove_ok) |
CH 0 status register relative address CH 1 status register relative address CH 2 status register relative address CH 3 status register relative address CH 4 status register relative address CH 5 status register relative address CH 6 status register relative address CH 7 status register relative address. | |
BOOL | cvt_V1724_get_system_info (cvt_V1724_data *p_data, UINT16 *p_firmware_rev, UINT16 *p_serial_number) |
Gets board's system information. | |
BOOL | cvt_V1724_set_MCST_CBLT (cvt_V1724_data *p_data, UINT8 address, MCST_CBLT_board_pos pos) |
Setups MCST/CBLT parameters this board. |
Definition in file cvt_V1724.h.
|
Enable/ disable V1724 builtin data queue. Define this to enable V1724 builtin data queue; comment out to disable this feature Definition at line 32 of file cvt_V1724.h. |
|
The channel Samples' Number for each block.
Definition at line 693 of file cvt_V1724.h. |
|
CH Configuration register bitmasks.
Definition at line 649 of file cvt_V1724.h. |
|
CH Control register bitmasks.
Definition at line 609 of file cvt_V1724.h. |
|
CH Read configuration register bitmasks.
Definition at line 628 of file cvt_V1724.h. |
|
CH status register bitmasks.
Definition at line 678 of file cvt_V1724.h. |
|
Control register bitmasks.
Definition at line 566 of file cvt_V1724.h. |
|
CH DAC data configuration register bitmasks.
Definition at line 662 of file cvt_V1724.h. |
|
V1724 CVT_V1724/MCST Control register bit masks.
Definition at line 714 of file cvt_V1724.h. |
|
Status register bitmasks.
Definition at line 579 of file cvt_V1724.h. |
|
Trigger enable bitmasks.
Definition at line 589 of file cvt_V1724.h. |
|
The registers indexes. Provides an entry for each register: This is the index into the CVT_V792_REG_TABLE board table
Definition at line 435 of file cvt_V1724.h. |
|
V1724 VME boards closing and resource free. Provides specific handling for V1724 boards closing.
Definition at line 236 of file cvt_V1724.c. References cvt_board_close(), FALSE, cvt_V1724_data::m_common_data, cvt_V1724_data::m_tmp_sample_buffer, cvt_V1724_data::m_tmp_sample_buffer_size, and TRUE. |
|
Performs a data clear. Writes a dummy value into SW_CLEAR_REGISTER register.
Definition at line 783 of file cvt_V1724.c. References CVT_V1724_SW_CLEAR_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE. |
|
CH 0 status register relative address CH 1 status register relative address CH 2 status register relative address CH 3 status register relative address CH 4 status register relative address CH 5 status register relative address CH 6 status register relative address CH 7 status register relative address. < < < < < < < < Definition at line 949 of file cvt_V1724.c. References cvt_read_reg(), CVT_V1724_CH0_STATUS_INDEX, CVT_V1724_CH1_STATUS_INDEX, CVT_V1724_CH2_STATUS_INDEX, CVT_V1724_CH3_STATUS_INDEX, CVT_V1724_CH4_STATUS_INDEX, CVT_V1724_CH5_STATUS_INDEX, CVT_V1724_CH6_STATUS_INDEX, CVT_V1724_CH7_STATUS_INDEX, CVT_V1724_CHSTS_BLOCK_REM_OK_MSK, CVT_V1724_CHSTS_DAC_BUSY_MSK, CVT_V1724_CHSTS_FIFO_EMPTY_MSK, CVT_V1724_CHSTS_FIFO_FULL_MSK, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, TRACE1, and TRUE. Referenced by cvt_V1724_set_channel_offset(). |
|
Gets board's system information. Reads the firmware revision register and the serial number.
Definition at line 999 of file cvt_V1724.c. References cvt_read_reg(), CVT_V1724_FW_REV_INDEX, FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE. |
|
V1724 VME boards data initialization. Provides specific handling for V1724 boards opening.
Definition at line 207 of file cvt_V1724.c. References cvt_board_open(), cvt_V1724_set_MCST_CBLT(), FALSE, cvt_V1724_data::m_common_data, cvt_V1724_data::m_tmp_sample_buffer, cvt_V1724_data::m_tmp_sample_buffer_size, cvt_board_data::set_MCST_CBLT, and TRUE. |
|
CH 0 Read Block Trigger register index CH 1 Read Block Trigger register index CH 2 Read Block Trigger register index CH 3 Read Block Trigger register index CH 4 Read Block Trigger register index CH 5 Read Block Trigger register index CH 6 Read Block Trigger register index CH 7 Read Block Trigger register index CH 0 Number of Blocks Written register index CH 1 Number of Blocks Written register index CH 2 Number of Blocks Written register index CH 3 Number of Blocks Written register index CH 4 Number of Blocks Written register index CH 5 Number of Blocks Written register index CH 6 Number of Blocks Written register index CH 7 Number of Blocks Written register index. < < < < < < < < < < < < < < < < Definition at line 272 of file cvt_V1724.c. References cvt_FIFO_BLT_read_reg(), cvt_read_reg(), CVT_V1724_BROAD_CH_BLK_REM_NUM_INDEX, CVT_V1724_CH0_BLK_WRI_NUM_INDEX, CVT_V1724_CH0_READ_BLK_TRIG_INDEX, CVT_V1724_CH1_BLK_WRI_NUM_INDEX, CVT_V1724_CH1_READ_BLK_TRIG_INDEX, CVT_V1724_CH2_BLK_WRI_NUM_INDEX, CVT_V1724_CH2_READ_BLK_TRIG_INDEX, CVT_V1724_CH3_BLK_WRI_NUM_INDEX, CVT_V1724_CH3_READ_BLK_TRIG_INDEX, CVT_V1724_CH4_BLK_WRI_NUM_INDEX, CVT_V1724_CH4_READ_BLK_TRIG_INDEX, CVT_V1724_CH5_BLK_WRI_NUM_INDEX, CVT_V1724_CH5_READ_BLK_TRIG_INDEX, CVT_V1724_CH6_BLK_WRI_NUM_INDEX, CVT_V1724_CH6_READ_BLK_TRIG_INDEX, CVT_V1724_CH7_BLK_WRI_NUM_INDEX, CVT_V1724_CH7_READ_BLK_TRIG_INDEX, CVT_V1724_MAX_CHANNEL, cvt_write(), FALSE, cvt_V1724_data::m_common_data, cvt_board_data::m_p_reg_table, cvt_V1724_data::m_tmp_sample_buffer, cvt_V1724_data::m_tmp_sample_buffer_size, TRACE1, and TRUE. |
|
Setups the acquisition mode parameters. < 2048 blocks, 256 32-bit memory locations ( 1K byte/block), 512 samples/block < 1024 blocks, 512 32-bit memory locations ( 2K byte/block), 1K samples/block < 512 blocks, 1024 32-bit memory locations ( 4K byte/block), 2K samples/block < 256 blocks, 2048 32-bit memory locations ( 8K byte/block), 4K samples/block < 128 blocks, 4096 32-bit memory locations ( 16K byte/block), 8K samples/block < 64 blocks, 8192 32-bit memory locations ( 32K byte/block), 16K samples/block < 32 blocks, 16384 32-bit memory locations ( 64K byte/block), 32K samples/block < 16 blocks, 32768 32-bit memory locations ( 128K byte/block), 64K samples/block < 8 blocks, 65536 32-bit memory locations ( 256K byte/block), 128K samples/block < 4 blocks, 131072 32-bit memory locations ( 512K byte/block), 256K samples/block < 2 blocks, 262144 32-bit memory locations (1024K byte/block), 512K samples/block Definition at line 563 of file cvt_V1724.c. References CVT_V1724_BROAD_CH_BLKSIZE_INDEX, CVT_V1724_BROAD_CH_CLEAR_CTRL_INDEX, CVT_V1724_BROAD_CH_SET_CTRL_INDEX, CVT_V1724_CHBKSZ_128K, CVT_V1724_CHBKSZ_16K, CVT_V1724_CHBKSZ_1K, CVT_V1724_CHBKSZ_256K, CVT_V1724_CHBKSZ_2K, CVT_V1724_CHBKSZ_32K, CVT_V1724_CHBKSZ_4K, CVT_V1724_CHBKSZ_512, CVT_V1724_CHBKSZ_512K, CVT_V1724_CHBKSZ_64K, CVT_V1724_CHBKSZ_8K, CVT_V1724_CHCTRL_SAMPLE_ACQ_MSK, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, TRACE1, and TRUE. |
|
CH 0 DAC Data Configuration register index CH 1 DAC Data Configuration register index CH 2 DAC Data Configuration register index CH 3 DAC Data Configuration register index CH 4 DAC Data Configuration register index CH 5 DAC Data Configuration register index CH 6 DAC Data Configuration register index CH 7 DAC Data Configuration register index. < < < < < < < < Definition at line 799 of file cvt_V1724.c. References CVT_V1724_CH0_DAC_CONF_INDEX, CVT_V1724_CH1_DAC_CONF_INDEX, CVT_V1724_CH2_DAC_CONF_INDEX, CVT_V1724_CH3_DAC_CONF_INDEX, CVT_V1724_CH4_DAC_CONF_INDEX, CVT_V1724_CH5_DAC_CONF_INDEX, CVT_V1724_CH6_DAC_CONF_INDEX, CVT_V1724_CH7_DAC_CONF_INDEX, CVT_V1724_CHDAC_SET_A_MSK, CVT_V1724_CHDAC_SET_B_MSK, cvt_V1724_get_channel_status(), CVT_V1724_MAX_CHANNEL, CVT_V1724_SET_CH_DAC_CONF, FALSE, TRACE, and TRUE. |
|
CH 0 Threshold register index CH 1 Threshold register index CH 2 Threshold register index CH 3 Threshold register index CH 4 Threshold register index CH 5 Threshold register index CH 6 Threshold register index CH 7 Threshold register index CH 0 Over/Under Threshold Samples register index CH 1 Over/Under Threshold Samples register index CH 2 Over/Under Threshold Samples register index CH 3 Over/Under Threshold Samples register index CH 4 Over/Under Threshold Samples register index CH 5 Over/Under Threshold Samples register index CH 6 Over/Under Threshold Samples register index CH 7 Over/Under Threshold Samples register index. < < < < < < < < < < < < < < < < Definition at line 862 of file cvt_V1724.c. References CVT_V1724_CH0_THR_SAMPLE_INDEX, CVT_V1724_CH0_THRESHOLD_INDEX, CVT_V1724_CH1_THR_SAMPLE_INDEX, CVT_V1724_CH1_THRESHOLD_INDEX, CVT_V1724_CH2_THR_SAMPLE_INDEX, CVT_V1724_CH2_THRESHOLD_INDEX, CVT_V1724_CH3_THR_SAMPLE_INDEX, CVT_V1724_CH3_THRESHOLD_INDEX, CVT_V1724_CH4_THR_SAMPLE_INDEX, CVT_V1724_CH4_THRESHOLD_INDEX, CVT_V1724_CH5_THR_SAMPLE_INDEX, CVT_V1724_CH5_THRESHOLD_INDEX, CVT_V1724_CH6_THR_SAMPLE_INDEX, CVT_V1724_CH6_THRESHOLD_INDEX, CVT_V1724_CH7_THR_SAMPLE_INDEX, CVT_V1724_CH7_THRESHOLD_INDEX, CVT_V1724_MAX_CHANNEL, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, and TRACE. |
|
CH 0 Configuration register index CH 1 Configuration register index CH 2 Configuration register index CH 3 Configuration register index CH 4 Configuration register index CH 5 Configuration register index CH 6 Configuration register index CH 7 Configuration register index. < < < < < < < < Definition at line 624 of file cvt_V1724.c. References cvt_set_bitmask_reg(), CVT_V1724_CH0_CONF_INDEX, CVT_V1724_CH1_CONF_INDEX, CVT_V1724_CH2_CONF_INDEX, CVT_V1724_CH3_CONF_INDEX, CVT_V1724_CH4_CONF_INDEX, CVT_V1724_CH5_CONF_INDEX, CVT_V1724_CH6_CONF_INDEX, CVT_V1724_CH7_CONF_INDEX, CVT_V1724_CHCONF_DITHER_MSK, CVT_V1724_MAX_CHANNEL, FALSE, cvt_V1724_data::m_common_data, and TRACE. |
|
Setups interrupt parameters. Setups the relevant parameters for interrupt usage.
Definition at line 676 of file cvt_V1724.c. References CVT_V1724_INT_LEVEL_INDEX, CVT_V1724_INT_VECTOR_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE. |
|
Setups MCST/CBLT parameters this board. Setups the relevant parameters for MCST/CBLT usage.
Definition at line 1034 of file cvt_V1724.c. References CVT_V1724_MCCTRL_FIRST_BOARD_MSK, CVT_V1724_MCCTRL_LAST_BOARD_MSK, CVT_V1724_MCCTRL_MID_BOARD_MSK, CVT_V1724_MCST_CBLT_ADDRESS_INDEX, CVT_V1724_MCST_CBLT_CTRL_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, MCST_CBLT_board_pos_first, MCST_CBLT_board_pos_last, MCST_CBLT_board_pos_mid, TRACE, TRACE1, and TRUE. Referenced by cvt_V1724_open(). |
|
Setups data readout mode parameters. Setups the relevant parameters for data readout.
Definition at line 721 of file cvt_V1724.c. References cvt_clear_bitmask_reg(), cvt_set_bitmask_reg(), CVT_V1724_BLT_EVENT_NUM_INDEX, CVT_V1724_CONTROL_INDEX, CVT_V1724_CTRL_BERR_ENABLE_MSK, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE. |
|
Setups the triggering mode parameters. < Enable CH 0 trigger bit < Enable CH 1 trigger bit < Enable CH 2 trigger bit < Enable CH 3 trigger bit < Enable CH 4 trigger bit < Enable CH 5 trigger bit < Enable CH 6 trigger bit < Enable CH 7 trigger bit Definition at line 443 of file cvt_V1724.c. References CVT_V1724_BROAD_CH_CLEAR_CTRL_INDEX, CVT_V1724_BROAD_CH_SET_CTRL_INDEX, CVT_V1724_CHCTRL_TRG_IN_EN_MSK, CVT_V1724_CHCTRL_TRG_OUT_EN_MSK, CVT_V1724_CHCTRL_TRG_OUT_UNDER_EN_MSK, CVT_V1724_CHCTRL_TRG_OVERLAP_MSK, CVT_V1724_MAX_CHANNEL, CVT_V1724_TRGEN_CH0_MSK, CVT_V1724_TRGEN_CH1_MSK, CVT_V1724_TRGEN_CH2_MSK, CVT_V1724_TRGEN_CH3_MSK, CVT_V1724_TRGEN_CH4_MSK, CVT_V1724_TRGEN_CH5_MSK, CVT_V1724_TRGEN_CH6_MSK, CVT_V1724_TRGEN_CH7_MSK, CVT_V1724_TRGEN_ENABLE_MSK, CVT_V1724_TRGEN_EXT_MSK, CVT_V1724_TRGEN_SW_MSK, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, and TRACE. |
|
Performs a software reset. Writes a dummy value into SW_RESET_REGISTER register.
Definition at line 767 of file cvt_V1724.c. References CVT_V1724_SW_RESET_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE. |
|
Performs a software trigger. Sends a software trigger. Software triggers must be enabled
Definition at line 931 of file cvt_V1724.c. References CVT_V1724_SW_TRIGGER_INDEX, cvt_write_reg(), FALSE, cvt_V1724_data::m_common_data, TRACE, and TRUE. |