#include "cvt_common_defs.h"
#include "cvt_board_commons.h"
Go to the source code of this file.
Data Structures | |
struct | cvt_V1190_data |
V1190 board data structure. More... | |
Defines | |
#define | CVT_V1190_USE_DATA_QUEUE 1 |
Enable/ disable V1190 builtin data queue. | |
#define | CVT_V1190_QUEUE_SIZE_DWORD (1024*1024) |
V1190 data queue size. | |
#define | CVT_V1190_NUM_TDC_A 4 |
TDCs number for V1190A. | |
#define | CVT_V1190_NUM_TDC_B 2 |
TDCs number for V1190B. | |
#define | CVT_V1190_OUT_BUFFER_ADD 0x0000 |
Output buffer relative address. | |
#define | CVT_V1190_CONTROL_ADD 0x1000 |
Control register relative address. | |
#define | CVT_V1190_STATUS_ADD 0x1002 |
Status register relative address. | |
#define | CVT_V1190_INT_LEVEL_ADD 0x100A |
Interrupt level register relative address. | |
#define | CVT_V1190_INT_VECTOR_ADD 0x100C |
Interrupt vector register relative address. | |
#define | CVT_V1190_GEO_ADDRESS_ADD 0x100E |
Geo Address register relative address. | |
#define | CVT_V1190_MCST_CBLT_ADDRESS_ADD 0x1010 |
MCST/CBLT Base Address register relative address. | |
#define | CVT_V1190_MCST_CBLT_CTRL_ADD 0x1012 |
MCST/CBLT Control register relative address. | |
#define | CVT_V1190_MOD_RESET_ADD 0x1014 |
Module reset register relative address. | |
#define | CVT_V1190_SW_CLEAR_ADD 0x1016 |
Software clear register relative address. | |
#define | CVT_V1190_SW_EVENT_RESET_ADD 0x1018 |
Software event reset register relative address. | |
#define | CVT_V1190_SW_TRIGGER_ADD 0x101A |
Software trigger register relative address. | |
#define | CVT_V1190_EVENT_COUNTER_ADD 0x101C |
Event counter register relative address. | |
#define | CVT_V1190_EVENT_STORED_ADD 0x1020 |
Event stored register relative address. | |
#define | CVT_V1190_ALMOST_FULL_LVL_ADD 0x1022 |
Almost full level register relative address. | |
#define | CVT_V1190_BLT_EVENT_NUM_ADD 0x1024 |
BLT event number register relative address. | |
#define | CVT_V1190_FW_REV_ADD 0x1026 |
Firmware revision register relative address. | |
#define | CVT_V1190_TESTREG_ADD 0x1028 |
Testreg register relative address. | |
#define | CVT_V1190_OUT_PROG_CTRL_ADD 0x102C |
Output prog control register relative address. | |
#define | CVT_V1190_MICRO_ADD 0x102E |
Micro register relative address. | |
#define | CVT_V1190_MICRO_HND_ADD 0x1030 |
Micro handshake register relative address. | |
#define | CVT_V1190_SEL_FLASH_ADD 0x1032 |
Select Flash register relative address. | |
#define | CVT_V1190_FLASH_ADD 0x1034 |
Flash register relative address. | |
#define | CVT_V1190_COMP_SRAM_PAGE_ADD 0x1036 |
Compensation SRAM Page register relative address. | |
#define | CVT_V1190_EVENT_FIFO_ADD 0x1038 |
Event FIFO register relative address. | |
#define | CVT_V1190_EVENT_FIFO_STORED_ADD 0x103C |
Event FIFO stored register relative address. | |
#define | CVT_V1190_EVENT_FIFO_STATUS_ADD 0x103E |
Event FIFO status register relative address. | |
#define | CVT_V1190_DUMMY32_ADD 0x1200 |
Dummy 32 register relative address. | |
#define | CVT_V1190_DUMMY16_ADD 0x1204 |
Dummy 16 register relative address. | |
#define | CVT_V1190_ROM_OUI_MSB_ADD 0x4024 |
Manufacturer identifier (IEEE OUI) (MSB) relative address. | |
#define | CVT_V1190_ROM_OUI_ADD 0x4028 |
Manufacturer identifier (IEEE OUI) relative address. | |
#define | CVT_V1190_ROM_OUI_LSB_ADD 0x402C |
Manufacturer identifier (IEEE OUI) (LSB) relative address. | |
#define | CVT_V1190_ROM_VERSION_ADD 0x4030 |
Purchased version of the Mod.V1190 relative address. | |
#define | CVT_V1190_ROM_BOARD_ID_MSB_ADD 0x4034 |
Board identifier (MSB) relative address. | |
#define | CVT_V1190_ROM_BOARD_ID_ADD 0x4038 |
Board identifier relative address. | |
#define | CVT_V1190_ROM_BOARD_ID_LSB_ADD 0x403C |
Board identifier (LSB) relative address. | |
#define | CVT_V1190_ROM_REVISION_3_ADD 0x4040 |
Hardware revision identifier relative address. | |
#define | CVT_V1190_ROM_REVISION_2_ADD 0x4044 |
Hardware revision identifier relative address. | |
#define | CVT_V1190_ROM_REVISION_1_ADD 0x4048 |
Hardware revision identifier relative address. | |
#define | CVT_V1190_ROM_REVISION_0_ADD 0x404C |
Hardware revision identifier relative address. | |
#define | CVT_V1190_ROM_SERIAL_MSB_ADD 0x4080 |
Serial number (MSB) relative address. | |
#define | CVT_V1190_ROM_SERIAL_LSB_ADD 0x4084 |
Serial number (LSB) relative address. | |
#define | CVT_V1190_OUT_BUFFER_DATA_SIZE cvD64 |
Output buffer data size. | |
#define | CVT_V1190_CONTROL_DATA_SIZE cvD16 |
Control register data size. | |
#define | CVT_V1190_STATUS_DATA_SIZE cvD16 |
Status register data size. | |
#define | CVT_V1190_INT_LEVEL_DATA_SIZE cvD16 |
Interrupt level register data size. | |
#define | CVT_V1190_INT_VECTOR_DATA_SIZE cvD16 |
Interrupt vector register data size. | |
#define | CVT_V1190_GEO_ADDRESS_DATA_SIZE cvD16 |
Geo Address register data size. | |
#define | CVT_V1190_MCST_CBLT_ADDRESS_DATA_SIZE cvD16 |
MCST/CBLT Base Address register data size. | |
#define | CVT_V1190_MCST_CBLT_CTRL_DATA_SIZE cvD16 |
MCST/CBLT Control register data size. | |
#define | CVT_V1190_MOD_RESET_DATA_SIZE cvD16 |
Module reset register data size. | |
#define | CVT_V1190_SW_CLEAR_DATA_SIZE cvD16 |
Software clear register data size. | |
#define | CVT_V1190_SW_EVENT_RESET_DATA_SIZE cvD16 |
Software event reset register data size. | |
#define | CVT_V1190_SW_TRIGGER_DATA_SIZE cvD16 |
Software trigger register data size. | |
#define | CVT_V1190_EVENT_COUNTER_DATA_SIZE cvD32 |
Event counter register data size. | |
#define | CVT_V1190_EVENT_STORED_DATA_SIZE cvD16 |
Event stored register data size. | |
#define | CVT_V1190_ALMOST_FULL_LVL_DATA_SIZE cvD16 |
Almost full level register data size. | |
#define | CVT_V1190_BLT_EVENT_NUM_DATA_SIZE cvD16 |
BLT event number register data size. | |
#define | CVT_V1190_FW_REV_DATA_SIZE cvD16 |
Firmware revision register data size. | |
#define | CVT_V1190_TESTREG_DATA_SIZE cvD32 |
Testreg register data size. | |
#define | CVT_V1190_OUT_PROG_CTRL_DATA_SIZE cvD16 |
Output prog control register data size. | |
#define | CVT_V1190_MICRO_DATA_SIZE cvD16 |
Micro register data size. | |
#define | CVT_V1190_MICRO_HND_DATA_SIZE cvD16 |
Micro handshake register data size. | |
#define | CVT_V1190_SEL_FLASH_DATA_SIZE cvD16 |
Select Flash register data size. | |
#define | CVT_V1190_FLASH_DATA_SIZE cvD16 |
Flash register data size. | |
#define | CVT_V1190_COMP_SRAM_PAGE_DATA_SIZE cvD16 |
Compensation SRAM Page register data size. | |
#define | CVT_V1190_EVENT_FIFO_DATA_SIZE cvD32 |
Event FIFO register data size. | |
#define | CVT_V1190_EVENT_FIFO_STORED_DATA_SIZE cvD16 |
Event FIFO stored register data size. | |
#define | CVT_V1190_EVENT_FIFO_STATUS_DATA_SIZE cvD16 |
Event FIFO status register data size. | |
#define | CVT_V1190_DUMMY32_DATA_SIZE cvD32 |
Dummy 32 register data size. | |
#define | CVT_V1190_DUMMY16_DATA_SIZE cvD16 |
Dummy 16 register data size. | |
#define | CVT_V1190_ROM_OUI_MSB_DATA_SIZE cvD16 |
Manufacturer identifier (IEEE OUI) (MSB) data size. | |
#define | CVT_V1190_ROM_OUI_DATA_SIZE cvD16 |
Manufacturer identifier (IEEE OUI) data size. | |
#define | CVT_V1190_ROM_OUI_LSB_DATA_SIZE cvD16 |
Manufacturer identifier (IEEE OUI) (LSB) data size. | |
#define | CVT_V1190_ROM_VERSION_DATA_SIZE cvD16 |
Purchased version of the Mod.V1190 data size. | |
#define | CVT_V1190_ROM_BOARD_ID_MSB_DATA_SIZE cvD16 |
Board identifier (MSB) data size. | |
#define | CVT_V1190_ROM_BOARD_ID_DATA_SIZE cvD16 |
Board identifier data size. | |
#define | CVT_V1190_ROM_BOARD_ID_LSB_DATA_SIZE cvD16 |
Board identifier (LSB) data size. | |
#define | CVT_V1190_ROM_REVISION_3_DATA_SIZE cvD16 |
Hardware revision identifier data size. | |
#define | CVT_V1190_ROM_REVISION_2_DATA_SIZE cvD16 |
Hardware revision identifier data size. | |
#define | CVT_V1190_ROM_REVISION_1_DATA_SIZE cvD16 |
Hardware revision identifier data size. | |
#define | CVT_V1190_ROM_REVISION_0_DATA_SIZE cvD16 |
Hardware revision identifier data size. | |
#define | CVT_V1190_ROM_SERIAL_MSB_DATA_SIZE cvD16 |
Serial number (MSB) data size. | |
#define | CVT_V1190_ROM_SERIAL_LSB_DATA_SIZE cvD16 |
Serial number (LSB) data size. | |
#define | CVT_V1190_OUT_BUFFER_AM cvA32_S_MBLT |
Output buffer address modifier. | |
#define | CVT_V1190_CONTROL_AM cvA32_S_DATA |
Control register address modifier. | |
#define | CVT_V1190_STATUS_AM cvA32_S_DATA |
Status register address modifier. | |
#define | CVT_V1190_INT_LEVEL_AM cvA32_S_DATA |
Interrupt level register data size. | |
#define | CVT_V1190_INT_VECTOR_AM cvA32_S_DATA |
Interrupt vector register data size. | |
#define | CVT_V1190_GEO_ADDRESS_AM cvA32_S_DATA |
Geo Address register data size. | |
#define | CVT_V1190_MCST_CBLT_ADDRESS_AM cvA32_S_DATA |
MCST/CBLT Base Address register data size. | |
#define | CVT_V1190_MCST_CBLT_CTRL_AM cvA32_S_DATA |
MCST/CBLT Control register data size. | |
#define | CVT_V1190_MOD_RESET_AM cvA32_S_DATA |
Module reset register address modifier. | |
#define | CVT_V1190_SW_CLEAR_AM cvA32_S_DATA |
Software clear register address modifier. | |
#define | CVT_V1190_SW_EVENT_RESET_AM cvA32_S_DATA |
Software event reset register address modifier. | |
#define | CVT_V1190_SW_TRIGGER_AM cvA32_S_DATA |
Software trigger register address modifier. | |
#define | CVT_V1190_EVENT_COUNTER_AM cvA32_S_DATA |
Event counter register address modifier. | |
#define | CVT_V1190_EVENT_STORED_AM cvA32_S_DATA |
Event stored register address modifier. | |
#define | CVT_V1190_ALMOST_FULL_LVL_AM cvA32_S_DATA |
Almost full level register address modifier. | |
#define | CVT_V1190_BLT_EVENT_NUM_AM cvA32_S_DATA |
BLT event number register address modifier. | |
#define | CVT_V1190_FW_REV_AM cvA32_S_DATA |
Firmware revision register address modifier. | |
#define | CVT_V1190_TESTREG_AM cvA32_S_DATA |
Testreg register address modifier. | |
#define | CVT_V1190_OUT_PROG_CTRL_AM cvA32_S_DATA |
Output prog control register address modifier. | |
#define | CVT_V1190_MICRO_AM cvA32_S_DATA |
Micro register address modifier. | |
#define | CVT_V1190_MICRO_HND_AM cvA32_S_DATA |
Micro handshake register address modifier. | |
#define | CVT_V1190_SEL_FLASH_AM cvA32_S_DATA |
Select Flash register address modifier. | |
#define | CVT_V1190_FLASH_AM cvA32_S_DATA |
Flash register address modifier. | |
#define | CVT_V1190_COMP_SRAM_PAGE_AM cvA32_S_DATA |
Compensation SRAM Page register address modifier. | |
#define | CVT_V1190_EVENT_FIFO_AM cvA32_S_DATA |
Event FIFO register address modifier. | |
#define | CVT_V1190_EVENT_FIFO_STORED_AM cvA32_S_DATA |
Event FIFO stored register address modifier. | |
#define | CVT_V1190_EVENT_FIFO_STATUS_AM cvA32_S_DATA |
Event FIFO status register address modifier. | |
#define | CVT_V1190_DUMMY32_AM cvA32_S_DATA |
Dummy 32 register address modifier. | |
#define | CVT_V1190_DUMMY16_AM cvA32_S_DATA |
Dummy 16 register address modifier. | |
#define | CVT_V1190_ROM_OUI_MSB_AM cvA32_S_DATA |
Manufacturer identifier (IEEE OUI) (MSB) address modifier. | |
#define | CVT_V1190_ROM_OUI_AM cvA32_S_DATA |
Manufacturer identifier (IEEE OUI) address modifier. | |
#define | CVT_V1190_ROM_OUI_LSB_AM cvA32_S_DATA |
Manufacturer identifier (IEEE OUI) (LSB) address modifier. | |
#define | CVT_V1190_ROM_VERSION_AM cvA32_S_DATA |
Purchased version of the Mod.V1190 address modifier. | |
#define | CVT_V1190_ROM_BOARD_ID_MSB_AM cvA32_S_DATA |
Board identifier (MSB) address modifier. | |
#define | CVT_V1190_ROM_BOARD_ID_AM cvA32_S_DATA |
Board identifier address modifier. | |
#define | CVT_V1190_ROM_BOARD_ID_LSB_AM cvA32_S_DATA |
Board identifier (LSB) address modifier. | |
#define | CVT_V1190_ROM_REVISION_3_AM cvA32_S_DATA |
Hardware revision identifier address modifier. | |
#define | CVT_V1190_ROM_REVISION_2_AM cvA32_S_DATA |
Hardware revision identifier address modifier. | |
#define | CVT_V1190_ROM_REVISION_1_AM cvA32_S_DATA |
Hardware revision identifier address modifier. | |
#define | CVT_V1190_ROM_REVISION_0_AM cvA32_S_DATA |
Hardware revision identifier address modifier. | |
#define | CVT_V1190_ROM_SERIAL_MSB_AM cvA32_S_DATA |
Serial number (MSB) address modifier. | |
#define | CVT_V1190_ROM_SERIAL_LSB_AM cvA32_S_DATA |
Serial number (LSB) address modifier. | |
#define | CVT_V1190_MAX_CHANNEL_N 128 |
The number of channels for V1190. | |
#define | CVT_V1190_STS_RES_MSK 0x3000 |
#define | CVT_V1190_GET_STATUS_RES(reg) ((((UINT16)reg)& CVT_V1190_STS_RES_MSK)>> 12) |
Extract the resolution from UINT16 value. | |
#define | CVT_V1190_SET_STATUS_RES(reg, value) reg= (((UINT16)reg)& ~CVT_V1190_STS_RES_MSK)| ((((UINT16)value)<< 12)&CVT_V1190_STS_RES_MSK) |
Sets the resolution into UINT16 value. | |
#define | CVT_V1190_STS_ERROR_MSK 0x03C0 |
#define | CVT_V1190_GET_STATUS_ERROR(reg) ((((UINT16)reg)& CVT_V1190_STS_ERROR_MSK)>> 6) |
Extract the error bitmask from UINT16 value. | |
#define | CVT_V1190_SET_STATUS_ERROR(reg, value) reg= (((UINT16)reg)& ~CVT_V1190_STS_ERROR_MSK)| ((((UINT16)value)<< 6)& CVT_V1190_STS_ERROR_MSK) |
Sets the error bitmask into UINT16 value. | |
#define | CVT_V1190_PRLT_MSK 0x0007 |
#define | CVT_V1190_GET_PAIR_RES_LEADING_TIME(reg) ((UINT8)(((UINT16)reg)& CVT_V1190_PRLT_MSK)) |
Extract the leading time from UINT16 value. | |
#define | CVT_V1190_SET_PAIR_RES_LEADING_TIME(reg, value) reg= (((UINT16)reg)& ~CVT_V1190_PRLT_MSK)| ((UINT16)value& CVT_V1190_PRLT_MSK) |
Sets the leading time into UINT16 value. | |
#define | CVT_V1190_PRW_MSK 0x0F00 |
#define | CVT_V1190_GET_PAIR_RES_WITH(reg) ((UINT8)((((UINT16)reg)& CVT_V1190_PRW_MSK)>> 8)) |
Extract the resolution from UINT16 value. | |
#define | CVT_V1190_SET_PAIR_RES_WITH(reg, value) reg= (((UINT16)reg)& ~CVT_V1190_PRW_MSK)| (((UINT16)value)<< 8) |
Sets the resolution into UINT16 value. | |
Enumerations | |
enum | CVT_V1190_TYPES { CVT_V1190_TYPE_A, CVT_V1190_TYPE_B } |
The V1190 board type. More... | |
enum | CVT_V1190_REG_INDEX { CVT_V1190_OUT_BUFFER_INDEX, CVT_V1190_CONTROL_INDEX, CVT_V1190_STATUS_INDEX, CVT_V1190_INT_LEVEL_INDEX, CVT_V1190_INT_VECTOR_INDEX, CVT_V1190_GEO_ADDRESS_INDEX, CVT_V1190_MCST_CBLT_ADDRESS_INDEX, CVT_V1190_MCST_CBLT_CTRL_INDEX, CVT_V1190_MOD_RESET_INDEX, CVT_V1190_SW_CLEAR_INDEX, CVT_V1190_SW_EVENT_RESET_INDEX, CVT_V1190_SW_TRIGGER_INDEX, CVT_V1190_EVENT_COUNTER_INDEX, CVT_V1190_EVENT_STORED_INDEX, CVT_V1190_ALMOST_FULL_LVL_INDEX, CVT_V1190_BLT_EVENT_NUM_INDEX, CVT_V1190_FW_REV_INDEX, CVT_V1190_TESTREG_INDEX, CVT_V1190_OUT_PROG_CTRL_INDEX, CVT_V1190_MICRO_INDEX, CVT_V1190_MICRO_HND_INDEX, CVT_V1190_SEL_FLASH_INDEX, CVT_V1190_FLASH_INDEX, CVT_V1190_COMP_SRAM_PAGE_INDEX, CVT_V1190_EVENT_FIFO_INDEX, CVT_V1190_EVENT_FIFO_STORED_INDEX, CVT_V1190_EVENT_FIFO_STATUS_INDEX, CVT_V1190_DUMMY32_INDEX, CVT_V1190_DUMMY16_INDEX, CVT_V1190_ROM_OUI_MSB_INDEX, CVT_V1190_ROM_OUI_INDEX, CVT_V1190_ROM_OUI_LSB_INDEX, CVT_V1190_ROM_VERSION_INDEX, CVT_V1190_ROM_BOARD_ID_MSB_INDEX, CVT_V1190_ROM_BOARD_ID_INDEX, CVT_V1190_ROM_BOARD_ID_LSB_INDEX, CVT_V1190_ROM_REVISION_3_INDEX, CVT_V1190_ROM_REVISION_2_INDEX, CVT_V1190_ROM_REVISION_1_INDEX, CVT_V1190_ROM_REVISION_0_INDEX, CVT_V1190_ROM_SERIAL_MSB_INDEX, CVT_V1190_ROM_SERIAL_LSB_INDEX } |
The registers indexes. More... | |
enum | CVT_V1190_MICRO_OPCODES { CVT_V1190_TRG_MATCH_OPCODE = 0x0000, CVT_V1190_CONT_STORE_OPCODE = 0x0100, CVT_V1190_READ_ACQ_MOD_OPCODE = 0x0200, CVT_V1190_SET_KEEP_TOKEN_OPCODE = 0x0300, CVT_V1190_CLEAR_KEEP_TOKEN_OPCODE = 0x0400, CVT_V1190_LOAD_DEF_CONFIG_OPCODE = 0x0500, CVT_V1190_SAVE_USER_CONFIG_OPCODE = 0x0600, CVT_V1190_LOAD_USER_CONFIG_OPCODE = 0x0700, CVT_V1190_AUTOLOAD_USER_CONFIG_OPCODE = 0x0800, CVT_V1190_AUTOLOAD_DEF_CONFIG_OPCODE = 0x0900, CVT_V1190_SET_WIN_WIDTH_OPCODE = 0x1000, CVT_V1190_SET_WIN_OFFSET_OPCODE = 0x1100, CVT_V1190_SET_SW_MARGIN_OPCODE = 0x1200, CVT_V1190_SET_REJ_MARGIN_OPCODE = 0x1300, CVT_V1190_EN_SUB_TRG_OPCODE = 0x1400, CVT_V1190_DIS_SUB_TRG_OPCODE = 0x1500, CVT_V1190_READ_TRG_CONF_OPCODE = 0x1600, CVT_V1190_SET_DETECTION_OPCODE = 0x2200, CVT_V1190_READ_DETECTION_OPCODE = 0x2300, CVT_V1190_SET_TR_LEAD_LSB_OPCODE = 0x2400, CVT_V1190_SET_PAIR_RES_OPCODE = 0x2500, CVT_V1190_READ_RES_OPCODE = 0x2600, CVT_V1190_SET_DEAD_TIME_OPCODE = 0x2800, CVT_V1190_READ_DEAD_TIME_OPCODE = 0x2900, CVT_V1190_EN_HEAD_TRAILER_OPCODE = 0x3000, CVT_V1190_DIS_HEAD_TRAILER_OPCODE = 0x3100, CVT_V1190_READ_HEAD_TRAILER_OPCODE = 0x3200, CVT_V1190_SET_EVENT_SIZE_OPCODE = 0x3300, CVT_V1190_READ_EVENT_SIZE_OPCODE = 0x3400, CVT_V1190_EN_ERROR_MARK_OPCODE = 0x3500, CVT_V1190_DIS_ERROR_MARK_OPCODE = 0x3600, CVT_V1190_EN_ERROR_BYPASS_OPCODE = 0x3700, CVT_V1190_DIS_ERROR_BYPASS_OPCODE = 0x3800, CVT_V1190_SET_ERROR_TYPES_OPCODE = 0x3900, CVT_V1190_READ_ERROR_TYPES_OPCODE = 0x3A00, CVT_V1190_SET_FIFO_SIZE_OPCODE = 0x3B00, CVT_V1190_READ_FIFO_SIZE_OPCODE = 0x3C00, CVT_V1190_EN_CHANNEL_OPCODE = 0x4000, CVT_V1190_DIS_CHANNEL_OPCODE = 0x4100, CVT_V1190_EN_ALL_CH_OPCODE = 0x4200, CVT_V1190_DIS_ALL_CH_OPCODE = 0x4300, CVT_V1190_WRITE_EN_PATTERN_OPCODE = 0x4400, CVT_V1190_READ_EN_PATTERN_OPCODE = 0x4500, CVT_V1190_WRITE_EN_PATTERN32_OPCODE = 0x4600, CVT_V1190_READ_EN_PATTERN32_OPCODE = 0x4700, CVT_V1190_SET_GLOB_OFFSET_OPCODE = 0x5000, CVT_V1190_READ_GLOB_OFFSET_OPCODE = 0x5100, CVT_V1190_SET_ADJUST_CH_OPCODE = 0x5200, CVT_V1190_READ_ADJUST_CH_OPCODE = 0x5300, CVT_V1190_SET_RC_ADJ_OPCODE = 0x5400, CVT_V1190_READ_RC_ADJ_OPCODE = 0x5500, CVT_V1190_SAVE_RC_ADJ_OPCODE = 0x5600, CVT_V1190_READ_TDC_ID_OPCODE = 0x6000, CVT_V1190_READ_MICRO_REV_OPCODE = 0x6100, CVT_V1190_RESET_DLL_PLL_OPCODE = 0x6200, CVT_V1190_WRITE_SETUP_REG_OPCODE = 0x7000, CVT_V1190_READ_SETUP_REG_OPCODE = 0x7100, CVT_V1190_UPDATE_SETUP_REG_OPCODE = 0x7200, CVT_V1190_DEFAULT_SETUP_REG_OPCODE = 0x7300, CVT_V1190_READ_ERROR_STATUS_OPCODE = 0x7400, CVT_V1190_READ_DLL_LOCK_OPCODE = 0x7500, CVT_V1190_READ_STATUS_STREAM_OPCODE = 0x7600, CVT_V1190_UPDATE_SETUP_TDC_OPCODE = 0x7700, CVT_V1190_WRITE_EEPROM_OPCODE = 0xC000, CVT_V1190_READ_EEPROM_OPCODE = 0xC100, CVT_V1190_MICROCONTROLLER_FW_OPCODE = 0xC200, CVT_V1190_WRITE_SPARE_OPCODE = 0xC300, CVT_V1190_READ_SPARE_OPCODE = 0xC400, CVT_V1190_EN_TEST_MODE_OPCODE = 0xC500, CVT_V1190_DIS_TEST_MODE_OPCODE = 0xC600, CVT_V1190_SET_TDC_TEST_OUTPUT_OPCODE = 0xC700, CVT_V1190_SET_DLL_CLOCK_OPCODE = 0xC800, CVT_V1190_READ_TDC_SETUP_SCAN_PATH_OPCODE = 0xC800 } |
Micro opcodes. More... | |
enum | CVT_V1190_MICRO_HND_BIT_MSK { CVT_V1190_MICRO_HND_WRITEOK_MSK = 0x0001, CVT_V1190_MICRO_HND_READOK_MSK = 0x0002 } |
Micro Handshake register bitmasks. More... | |
enum | CVT_V1190_CONTROL_MSK { CVT_V1190_CTRL_BERR_ENABLE_MSK = 0x0001, CVT_V1190_CTRL_TERM_MSK = 0x0002, CVT_V1190_CTRL_TERM_SW_MSK = 0x0004, CVT_V1190_CTRL_EMPTY_EVENT_MSK = 0x0008, CVT_V1190_CTRL_ALIGN64_MSK = 0x0010, CVT_V1190_CTRL_COMPENSATION_ENABLE_MSK = 0x0020, CVT_V1190_CTRL_TEST_FIFO_ENABLE_MSK = 0x0040, CVT_V1190_CTRL_READ_COMPENSATION_SRAM_ENABLE_MSK = 0x0080, CVT_V1190_CTRL_EVENT_FIFO_ENABLE_MSK = 0x0100, CVT_V1190_CTRL_TRIGGER_TIME_TAG_ENABLE_MSK = 0x0200 } |
V1190 Control register masks. More... | |
enum | CVT_V1190_STATUS_MSK { CVT_V1190_STS_DREADY_MSK = 0x0001, CVT_V1190_STS_ALMOST_FULL_MSK = 0x0002, CVT_V1190_STS_FULL_MSK = 0x0004, CVT_V1190_STS_TRG_MATCH_MSK = 0x0008, CVT_V1190_STS_HEADER_EN_MSK = 0x0010, CVT_V1190_STS_TERM_ON_MSK = 0x0020, CVT_V1190_STS_ERROR_0_MSK = 0x0040, CVT_V1190_STS_ERROR_1_MSK = 0x0080, CVT_V1190_STS_ERROR_2_MSK = 0x0100, CVT_V1190_STS_ERROR_3_MSK = 0x0200, CVT_V1190_STS_BERR_FLAG_MSK = 0x0400, CVT_V1190_STS_PURGED_MSK = 0x0800, CVT_V1190_STS_RES_0_MSK = 0x1000, CVT_V1190_STS_RES_1_MSK = 0x2000, CVT_V1190_STS_PAIR_MODE_MSK = 0x4000, CVT_V1190_STS_TRIGGER_LOST_MSK = 0x8000 } |
V1190 status register masks. More... | |
enum | CVT_V1190_STATUS_RES { CVT_V1190_STS_RES_800PS = 0x0000, CVT_V1190_STS_RES_200PS = 0x0001, CVT_V1190_STS_RES_100PS = 0x0002 } |
V1190 status register resolution. More... | |
enum | CVT_V1190_EDGE_DETECTION_ENUM { CVT_V1190_ED_PAIR_MODE = 0, CVT_V1190_ED_TRAILING_ONLY = 1, CVT_V1190_ED_LEADING_ONLY = 2, CVT_V1190_ED_TRAILING_AND_LEADING = 3 } |
V1190 edge detection mode enumeration. More... | |
enum | CVT_V1190_TR_LEAD_LSB_ENUM { CVT_V1190_TLL_800PS = 0, CVT_V1190_TLL_200PS = 1, CVT_V1190_TLL_100PS = 2 } |
V1190 edge detection mode enumeration. More... | |
enum | CVT_V1190_PAIR_RES_LEADING_TIME_ENUM { CVT_V1190_PRLT_100PS = 0x0000, CVT_V1190_PRLT_200PS = 0x0001, CVT_V1190_PRLT_400PS = 0x0002, CVT_V1190_PRLT_800PS = 0x0003, CVT_V1190_PRLT_1_6NS = 0x0004, CVT_V1190_PRLT_3_12NS = 0x0005, CVT_V1190_PRLT_6_25NS = 0x0006, CVT_V1190_PRLT_12_5NS = 0x0007 } |
V1190 Set/read leading time resolution when pair enumeration. More... | |
enum | CVT_V1190_PAIR_RES_WIDTH_ENUM { CVT_V1190_PRW_100PS = 0x0000, CVT_V1190_PRW_200PS = 0x0001, CVT_V1190_PRW_400PS = 0x0002, CVT_V1190_PRW_800PS = 0x0003, CVT_V1190_PRW_1_6NS = 0x0004, CVT_V1190_PRW_3_12NS = 0x0005, CVT_V1190_PRW_6_25NS = 0x0006, CVT_V1190_PRW_12_5NS = 0x0007, CVT_V1190_PRW_25NS = 0x0008, CVT_V1190_PRW_50NS = 0x0009, CVT_V1190_PRW_100NS = 0x000A, CVT_V1190_PRW_200NS = 0x000B, CVT_V1190_PRW_400NS = 0x000C, CVT_V1190_PRW_800NS = 0x000D } |
V1190 Set/read width resolution (when edge detection is pair) enumeration. More... | |
enum | CVT_V1190_DEAD_TIME_ENUM { CVT_V1190_DT_5NS = 0, CVT_V1190_DT_10NS = 1, CVT_V1190_DT_30NS = 2, CVT_V1190_DT_100NS = 3 } |
V1190 Set/read dead time enumeration. More... | |
enum | CVT_V1190_EVENT_SIZE_ENUM { CVT_V1190_ES_0 = 0, CVT_V1190_ES_1 = 1, CVT_V1190_ES_2 = 2, CVT_V1190_ES_4 = 3, CVT_V1190_ES_8 = 4, CVT_V1190_ES_16 = 5, CVT_V1190_ES_32 = 6, CVT_V1190_ES_64 = 7, CVT_V1190_ES_128 = 8, CVT_V1190_ES_NO_LIMIT = 9 } |
V1190 Set/read the maximun number of hits per event enumeration. More... | |
enum | CVT_V1190_ERROR_TYPES_MSK { CVT_V1190_ET_VERNIER_ERROR_MSK = 0x0001, CVT_V1190_ET_COARSE_ERROR_MSK = 0x0002, CVT_V1190_ET_CHANNEL_SELECT_ERROR_MSK = 0x0004, CVT_V1190_ET_L1_BUFFER_PARITY_ERROR_MSK = 0x0008, CVT_V1190_ET_TRIGGER_FIFO_PARITY_ERROR_MSK = 0x0008, CVT_V1190_ET_TRIGGER_MATCHING_ERROR_MSK = 0x0010, CVT_V1190_ET_READOUT_FIFO_PARITY_ERROR_MSK = 0x0020, CVT_V1190_ET_READOUT_STATE_ERROR_MSK = 0x0040, CVT_V1190_ET_SETUP_PARITY_ERROR_MSK = 0x0080, CVT_V1190_ET_CONTROL_PARITY_ERROR_MSK = 0x0100, CVT_V1190_ET_JTAG_INSTRUCTION_PARITY_ERROR_MSK = 0x0200 } |
TDC internal error type bitmasks. More... | |
enum | CVT_V1190_FIFO_SIZE_ENUM { CVT_V1190_FS_2 = 0, CVT_V1190_FS_4 = 1, CVT_V1190_FS_8 = 2, CVT_V1190_FS_16 = 3, CVT_V1190_FS_32 = 4, CVT_V1190_FS_64 = 5, CVT_V1190_FS_128 = 6, CVT_V1190_FS_256 = 7 } |
V1190 Set/read effective size of readout FIFO enumeration. More... | |
enum | CVT_V1190_DLL_CLOCK_ENUM { CVT_V1190_DC_40MHZ = 0, CVT_V1190_DC_PLL40MHZ = 1, CVT_V1190_DC_PLL160MHZ = 2, CVT_V1190_DC_PLL320MHZ = 3 } |
V1190 Set/read DLL clock enumeration. More... | |
enum | CVT_V1190_MCST_CBLT_CTRL_MSK { CVT_V1190_MCCTRL_DISABLED_BOARD_MSK = 0x0000, CVT_V1190_MCCTRL_LAST_BOARD_MSK = 0x0001, CVT_V1190_MCCTRL_FIRST_BOARD_MSK = 0x0002, CVT_V1190_MCCTRL_MID_BOARD_MSK = 0x0003 } |
V1190 CVT_V1190/MCST Control register bit masks. More... | |
Functions | |
BOOL | cvt_V1190_open (cvt_V1190_data *p_data, UINT16 base_address, long vme_handle, CVT_V1190_TYPES type) |
V1494 VME boards data initialization. | |
BOOL | cvt_V1190_close (cvt_V1190_data *p_data) |
V1190 VME boards closing and resource free. | |
BOOL | vme_board_1190_write_2_micro (cvt_V1190_data *p_data, UINT16 ope_code, const UINT16 *p_params, int num_params) |
Writes an opcode to V1190 micro register. | |
BOOL | vme_board_1190_read_from_micro (cvt_V1190_data *p_data, UINT16 ope_code, UINT16 *p_params, int num_params) |
Reads an opcode from V1190 micro register. | |
BOOL | cvt_V1190_set_bitmask_control (cvt_V1190_data *p_data, CVT_V1190_CONTROL_MSK value) |
Set a bitmask to control register. | |
BOOL | cvt_V1190_clear_bitmask_control (cvt_V1190_data *p_data, CVT_V1190_CONTROL_MSK value) |
Clear a bitmask to control 1 register. | |
BOOL | cvt_V1190_set_windows_width (cvt_V1190_data *p_data, UINT16 value) |
Set the window width. | |
BOOL | cvt_V1190_set_windows_offset (cvt_V1190_data *p_data, UINT16 value) |
Set the window offset. | |
BOOL | cvt_V1190_get_enable_pattern (cvt_V1190_data *p_data, UINT16 *p_enable_msk) |
Get the channel enable pattern. | |
BOOL | cvt_V1190_set_trigger_match (cvt_V1190_data *p_data) |
Set the trigger matching mode. | |
BOOL | cvt_V1190_set_head_trail_enable (cvt_V1190_data *p_data) |
Enable TDC Header and Trailer in readout. | |
BOOL | cvt_V1190_set_head_trail_disable (cvt_V1190_data *p_data) |
Disable TDC Header and Trailer in readout. | |
BOOL | cvt_V1190_read_MEB (cvt_V1190_data *p_data, void *p_buff, UINT32 *p_buff_size) |
Reads data from the Multiple event buffer and stores to user buffer. | |
BOOL | cvt_V1190_set_continuous_acquisition_mode (cvt_V1190_data *p_data, CVT_V1190_EDGE_DETECTION_ENUM edge_detection, CVT_V1190_PAIR_RES_WIDTH_ENUM res_width, const UINT16 *p_enable_msk) |
Enable and setups the continuous acquisition mode. | |
BOOL | cvt_V1190_set_trigger_matching_acquisition_mode (cvt_V1190_data *p_data, UINT16 window_width, UINT16 window_offset, UINT16 extra_search_margin, UINT16 reject_margin, CVT_V1190_EDGE_DETECTION_ENUM edge_detection, CVT_V1190_PAIR_RES_WIDTH_ENUM res_width, const UINT16 *p_enable_msk, BOOL header_trailer_enable, BOOL empty_event_enable, BOOL trigger_time_tag_enable) |
Enable and setups the trigger matching mode. | |
BOOL | cvt_V1190_set_interrupt (cvt_V1190_data *p_data, UINT8 level, UINT8 vector) |
Setups interrupt parameters. | |
BOOL | cvt_V1190_set_readout_mode (cvt_V1190_data *p_data, BOOL bus_error_enable, BOOL align64_enable, UINT8 blt_event_number) |
Setups data readout mode parameters. | |
BOOL | cvt_V1190_get_status (cvt_V1190_data *p_data, BOOL *p_is_data_ready, BOOL *p_is_term_on, BOOL *p_is_buffer_full, BOOL *p_is_buffer_almost_full, CVT_V1190_STATUS_RES *p_resolution, UINT8 *p_error_bitmask) |
Gets information about board status. | |
BOOL | cvt_V1190_get_event_counter (cvt_V1190_data *p_data, UINT32 *p_counter) |
Gets the event counter value. | |
BOOL | cvt_V1190_get_event_stored (cvt_V1190_data *p_data, UINT16 *p_counter) |
Gets the event stored value. | |
BOOL | cvt_V1190_get_system_info (cvt_V1190_data *p_data, UINT16 *p_firmware_rev, UINT16 *p_tdc_id_buff, UINT16 *p_micro_firmware_rev, UINT16 *p_serial_number) |
Gets board's system information. | |
BOOL | cvt_V1190_data_clear (cvt_V1190_data *p_data) |
Performs the data clear. | |
BOOL | cvt_V1190_module_reset (cvt_V1190_data *p_data) |
Performs the module reset. | |
BOOL | cvt_V1190_set_channel_enable (cvt_V1190_data *p_data, const UINT16 *p_enable_msk) |
Set the channel enable mask. | |
BOOL | cvt_V1190_set_almost_full (cvt_V1190_data *p_data, UINT16 almost_full_value) |
Sets the almost full level register. | |
BOOL | cvt_V1190_peek_event (cvt_V1190_data *p_data, UINT32 *out_buff, long *p_out_buff_size, UINT32 *p_event_count) |
Tries to peek (i.e. copy but not removing) an event from queue and save data to output buffer. | |
BOOL | cvt_V1190_inqueue (cvt_V1190_data *p_data, const UINT32 *in_buff, UINT32 in_buff_size) |
Tries to put in_buff_size data word to queue. | |
BOOL | cvt_V1190_dequeue (cvt_V1190_data *p_data, UINT32 *out_buff, UINT32 out_buff_size) |
Tries to get out_buff_size data word from the queue. | |
long | cvt_V1190_get_queue_free (cvt_V1190_data *p_data) |
Gets the number of free queue space (words). | |
long | cvt_V1190_get_queue_length (cvt_V1190_data *p_data) |
Gets the queue length. | |
BOOL | cvt_V1190_set_MCST_CBLT (cvt_V1190_data *p_data, UINT8 address, MCST_CBLT_board_pos pos) |
Setups MCST/CBLT parameters this board. |
Definition in file cvt_V1190.h.
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CVT_V1190_PAIR_RES register leading time significant bitmask Definition at line 524 of file cvt_V1190.h. |
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CVT_V1190_PAIR_RES register resolution significant bitmask Definition at line 552 of file cvt_V1190.h. |
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V1190 data queue size. This is the number of UINT32 words storage into the V1190 builtin data queue Definition at line 39 of file cvt_V1190.h. Referenced by cvt_V1190_dequeue(), cvt_V1190_get_queue_free(), cvt_V1190_get_queue_length(), cvt_V1190_inqueue(), cvt_V1190_open(), and cvt_V1190_peek_event(). |
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CVT_V1190_STATUS register error bitmask. Definition at line 475 of file cvt_V1190.h. |
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CVT_V1190_STATUS register resolution bitmask. Definition at line 471 of file cvt_V1190.h. |
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Enable/ disable V1190 builtin data queue. Define this to enable V1190 builtin data queue; comment out to disable this feature Definition at line 30 of file cvt_V1190.h. |
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V1190 Control register masks.
Definition at line 418 of file cvt_V1190.h. |
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V1190 Set/read dead time enumeration.
Definition at line 562 of file cvt_V1190.h. |
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V1190 Set/read DLL clock enumeration.
Definition at line 636 of file cvt_V1190.h. |
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V1190 edge detection mode enumeration.
Definition at line 485 of file cvt_V1190.h. |
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TDC internal error type bitmasks. Provides a bitmask for any relevant error bit of the TDC
Definition at line 597 of file cvt_V1190.h. |
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V1190 Set/read the maximun number of hits per event enumeration.
Definition at line 576 of file cvt_V1190.h. |
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V1190 Set/read effective size of readout FIFO enumeration.
Definition at line 618 of file cvt_V1190.h. |
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V1190 CVT_V1190/MCST Control register bit masks.
Definition at line 650 of file cvt_V1190.h. |
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Micro Handshake register bitmasks. Provides a bitmask for any relevant bit of the Micro Handshake register
Definition at line 406 of file cvt_V1190.h. |
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Micro opcodes.
Definition at line 282 of file cvt_V1190.h. |
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V1190 Set/read leading time resolution when pair enumeration.
Definition at line 512 of file cvt_V1190.h. |
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V1190 Set/read width resolution (when edge detection is pair) enumeration.
Definition at line 534 of file cvt_V1190.h. |
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The registers indexes. Provides an entry for each register: This is the index into the CVT_V1190_REG_TABLE board table
Definition at line 227 of file cvt_V1190.h. |
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V1190 status register masks.
Definition at line 438 of file cvt_V1190.h. |
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V1190 status register resolution.
Definition at line 464 of file cvt_V1190.h. |
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V1190 edge detection mode enumeration.
Definition at line 499 of file cvt_V1190.h. |
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The V1190 board type. Provides an entry foreach board type Definition at line 48 of file cvt_V1190.h. |
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Clear a bitmask to control 1 register. Clears the bits of the bitmask into the register. The inverted bitmask is ANDed to the actual regiter content
Definition at line 275 of file cvt_V1190.c. References cvt_clear_bitmask(), CVT_V1190_CONTROL_ADD, CVT_V1190_CONTROL_AM, CVT_V1190_CONTROL_DATA_SIZE, FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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V1190 VME boards closing and resource free. Provides specific handling for V1190 boards closing.
Definition at line 157 of file cvt_V1190.c. References cvt_board_close(), FALSE, cvt_V1190_data::m_common_data, cvt_V1190_data::m_queue, and TRUE. |
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Performs the data clear. Writes a dummy value to the software clear register.
Definition at line 848 of file cvt_V1190.c. References CVT_V1190_SW_CLEAR_INDEX, cvt_write_reg(), FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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Tries to get out_buff_size data word from the queue. Checks for queue available data words and gets data beginning from m_queue_ini. m_queue_ini will be update: if out_buff!= NULL the data will be stored into it.
Definition at line 1061 of file cvt_V1190.c. References cvt_V1190_get_queue_length(), CVT_V1190_QUEUE_SIZE_DWORD, FALSE, cvt_V1190_data::m_queue, cvt_V1190_data::m_queue_ini, and TRUE. Referenced by cvt_V1190_peek_event(). |
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Get the channel enable pattern. < The board is V1190A < The board is V1190B Definition at line 324 of file cvt_V1190.c. References CVT_V1190_NUM_TDC_A, CVT_V1190_NUM_TDC_B, CVT_V1190_TYPE_A, CVT_V1190_TYPE_B, CVT_V1190_WRITE_EN_PATTERN_OPCODE, FALSE, cvt_V1190_data::m_type, TRACE, TRACE1, and TRUE. |
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Gets the event counter value. Gets the event counter actual value.
Definition at line 747 of file cvt_V1190.c. References cvt_read_reg(), CVT_V1190_EVENT_COUNTER_INDEX, FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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Gets the event stored value. Gets the event stored actual value.
Definition at line 765 of file cvt_V1190.c. References cvt_read_reg(), CVT_V1190_EVENT_STORED_INDEX, FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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Gets the number of free queue space (words).
Definition at line 1095 of file cvt_V1190.c. References CVT_V1190_QUEUE_SIZE_DWORD, cvt_V1190_data::m_queue_end, and cvt_V1190_data::m_queue_ini. Referenced by cvt_V1190_inqueue(). |
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Gets the queue length.
Definition at line 1103 of file cvt_V1190.c. References CVT_V1190_QUEUE_SIZE_DWORD, cvt_V1190_data::m_queue_end, and cvt_V1190_data::m_queue_ini. Referenced by cvt_V1190_dequeue(). |
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Gets information about board status.
Definition at line 723 of file cvt_V1190.c. References cvt_read_reg(), CVT_V1190_GET_STATUS_ERROR, CVT_V1190_GET_STATUS_RES, CVT_V1190_STATUS_INDEX, CVT_V1190_STS_ALMOST_FULL_MSK, CVT_V1190_STS_DREADY_MSK, CVT_V1190_STS_FULL_MSK, CVT_V1190_STS_TERM_ON_MSK, FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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Gets board's system information. < The board is V1190A < The board is V1190B Definition at line 784 of file cvt_V1190.c. References cvt_read_reg(), CVT_V1190_FW_REV_INDEX, CVT_V1190_NUM_TDC_A, CVT_V1190_NUM_TDC_B, CVT_V1190_READ_TDC_ID_OPCODE, CVT_V1190_TYPE_A, CVT_V1190_TYPE_B, FALSE, cvt_V1190_data::m_common_data, cvt_V1190_data::m_type, TRACE, TRACE1, and vme_board_1190_write_2_micro(). |
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Tries to put in_buff_size data word to queue. Checks for the queue available free words and stores data beginning from m_queue_end. m_queue_end will be update
Definition at line 1033 of file cvt_V1190.c. References cvt_V1190_get_queue_free(), CVT_V1190_QUEUE_SIZE_DWORD, FALSE, cvt_V1190_data::m_queue, cvt_V1190_data::m_queue_end, and TRUE. |
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Performs the module reset. Writes a dummy value to the module reset register.
Definition at line 863 of file cvt_V1190.c. References CVT_V1190_MOD_RESET_INDEX, cvt_write_reg(), FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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V1494 VME boards data initialization. < The board is V1190A < The board is V1190B Definition at line 121 of file cvt_V1190.c. References cvt_board_open(), CVT_V1190_QUEUE_SIZE_DWORD, cvt_V1190_set_MCST_CBLT(), CVT_V1190_TYPE_A, CVT_V1190_TYPE_B, FALSE, cvt_V1190_data::m_common_data, cvt_V1190_data::m_queue, cvt_V1190_data::m_type, cvt_board_data::set_MCST_CBLT, TRACE, TRACE1, and TRUE. |
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Tries to peek (i.e. copy but not removing) an event from queue and save data to output buffer. Scans the queue beginning from m_queue_ini, searching for an event block: spurious data will be skipped. If first available event count matches requested event_count, data will be saved to output stream. If first available event count is minor than requested event_count event will be skipped and procedure repeated. If first available event count is major than requested event_count no data will be saved on out_stream (in_stream pointer not affected).
Definition at line 924 of file cvt_V1190.c. References CVT_BOARD_EVENT_COUNT_MSK, cvt_V1190_dequeue(), CVT_V1190_QUEUE_SIZE_DWORD, FALSE, GET_EVENT_COUNT, IS_GLOBAL_HEADER, IS_GLOBAL_TRAILER, cvt_V1190_data::m_queue, cvt_V1190_data::m_queue_end, cvt_V1190_data::m_queue_ini, TRACE1, and TRUE. |
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Reads data from the Multiple event buffer and stores to user buffer. Call cvt_FIFO_BLT_read for Multiple event buffer and stores data into user buffer. If the returned data is just a V1190 filler, this is discarded.
Definition at line 393 of file cvt_V1190.c. References cvt_FIFO_BLT_read(), CVT_V1190_OUT_BUFFER_ADD, CVT_V1190_OUT_BUFFER_AM, CVT_V1190_OUT_BUFFER_DATA_SIZE, FALSE, IS_FILLER, cvt_V1190_data::m_common_data, and TRUE. |
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Sets the almost full level register. Writes the specified value into the almost full level register. This Register allows the User to set the Almost Full Level of the Output Buffer. When the Output Buffer contains a number of words at least equal to the Almost Full Level, then an Interrupt Request (IRQ) is generated (if enabled) and the related bit in the Status Register is set.
Definition at line 906 of file cvt_V1190.c. References CVT_V1190_ALMOST_FULL_LVL_INDEX, cvt_write_reg(), FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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Set a bitmask to control register. Sets the bits of the bitmask into the register. The bitmask is ORed to the actual regiter content
Definition at line 260 of file cvt_V1190.c. References cvt_set_bitmask(), CVT_V1190_CONTROL_ADD, CVT_V1190_CONTROL_AM, CVT_V1190_CONTROL_DATA_SIZE, FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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Set the channel enable mask. < The board is V1190A < The board is V1190B Definition at line 877 of file cvt_V1190.c. References CVT_V1190_NUM_TDC_A, CVT_V1190_NUM_TDC_B, CVT_V1190_TYPE_A, CVT_V1190_TYPE_B, CVT_V1190_WRITE_EN_PATTERN_OPCODE, FALSE, cvt_V1190_data::m_type, TRACE, TRACE1, TRUE, and vme_board_1190_write_2_micro(). Referenced by cvt_V1190_set_continuous_acquisition_mode(), and cvt_V1190_set_trigger_matching_acquisition_mode(). |
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Enable and setups the continuous acquisition mode. < Pair mode. < Trailing only. < Leading only. < Trailing and Leading. < 100 ps. < 200 ps. < 400 ps. < 800 ps. < 1.6 ns. < 3.12 ns. < 6.25 ns. < 12.5 ns. < 25 ns. < 50 ns. < 100 ns. < 200 ns. < 400 ns. < 800 ns. Definition at line 411 of file cvt_V1190.c. References CVT_V1190_CONT_STORE_OPCODE, CVT_V1190_ED_LEADING_ONLY, CVT_V1190_ED_PAIR_MODE, CVT_V1190_ED_TRAILING_AND_LEADING, CVT_V1190_ED_TRAILING_ONLY, CVT_V1190_PRW_100NS, CVT_V1190_PRW_100PS, CVT_V1190_PRW_12_5NS, CVT_V1190_PRW_1_6NS, CVT_V1190_PRW_200NS, CVT_V1190_PRW_200PS, CVT_V1190_PRW_25NS, CVT_V1190_PRW_3_12NS, CVT_V1190_PRW_400NS, CVT_V1190_PRW_400PS, CVT_V1190_PRW_50NS, CVT_V1190_PRW_6_25NS, CVT_V1190_PRW_800NS, CVT_V1190_PRW_800PS, cvt_V1190_set_channel_enable(), CVT_V1190_SET_DETECTION_OPCODE, CVT_V1190_SET_PAIR_RES_OPCODE, CVT_V1190_SET_PAIR_RES_WITH, FALSE, TRACE, TRACE1, TRUE, and vme_board_1190_write_2_micro(). |
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Disable TDC Header and Trailer in readout. Writes through micro register opcode to disable TDC Header and Trailer in readout.
Definition at line 380 of file cvt_V1190.c. References CVT_V1190_DIS_HEAD_TRAILER_OPCODE, FALSE, TRACE, TRUE, and vme_board_1190_write_2_micro(). |
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Enable TDC Header and Trailer in readout. Writes through micro register opcode to enable TDC Header and Trailer in readout.
Definition at line 367 of file cvt_V1190.c. References CVT_V1190_EN_HEAD_TRAILER_OPCODE, FALSE, TRACE, TRUE, and vme_board_1190_write_2_micro(). |
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Setups interrupt parameters. Setups the relevant parameters for interrupt usage.
Definition at line 640 of file cvt_V1190.c. References CVT_V1190_INT_LEVEL_INDEX, CVT_V1190_INT_VECTOR_INDEX, cvt_write_reg(), FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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Setups MCST/CBLT parameters this board. Setups the relevant parameters for MCST/CBLT usage.
Definition at line 1111 of file cvt_V1190.c. References CVT_V1190_MCCTRL_FIRST_BOARD_MSK, CVT_V1190_MCCTRL_LAST_BOARD_MSK, CVT_V1190_MCCTRL_MID_BOARD_MSK, CVT_V1190_MCST_CBLT_ADDRESS_INDEX, CVT_V1190_MCST_CBLT_CTRL_INDEX, cvt_write_reg(), FALSE, cvt_V1190_data::m_common_data, MCST_CBLT_board_pos_first, MCST_CBLT_board_pos_last, MCST_CBLT_board_pos_mid, TRACE, TRACE1, and TRUE. Referenced by cvt_V1190_open(). |
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Setups data readout mode parameters. Setups the relevant parameters for data readout.
Definition at line 671 of file cvt_V1190.c. References cvt_clear_bitmask_reg(), cvt_set_bitmask_reg(), CVT_V1190_BLT_EVENT_NUM_INDEX, CVT_V1190_CONTROL_INDEX, CVT_V1190_CTRL_ALIGN64_MSK, CVT_V1190_CTRL_BERR_ENABLE_MSK, cvt_write_reg(), FALSE, cvt_V1190_data::m_common_data, TRACE, and TRUE. |
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Set the trigger matching mode. Writes dummy value through micro register opcode to set the trigger matching mode.
Definition at line 354 of file cvt_V1190.c. References CVT_V1190_TRG_MATCH_OPCODE, FALSE, TRACE, TRUE, and vme_board_1190_write_2_micro(). |
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Set the window offset. Writes the specified value through micro register opcode.
Definition at line 310 of file cvt_V1190.c. References CVT_V1190_SET_WIN_OFFSET_OPCODE, FALSE, TRACE, TRUE, and vme_board_1190_write_2_micro(). |
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Set the window width. Writes the specified value through micro register opcode.
Definition at line 296 of file cvt_V1190.c. References CVT_V1190_SET_WIN_WIDTH_OPCODE, FALSE, TRACE, TRUE, and vme_board_1190_write_2_micro(). |
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Reads an opcode from V1190 micro register. Reads an opcode to V1190 micro register and the specified number of parameters. Handles all the necessary handshake with micro to get the job done.
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Writes an opcode to V1190 micro register. Writes an opcode to V1190 micro register and the specified number of parameters. Handles all the necessary handshake with micro to get the job done.
Definition at line 184 of file cvt_V1190.c. References cvt_read_reg(), CVT_V1190_MICRO_HND_INDEX, CVT_V1190_MICRO_HND_WRITEOK_MSK, CVT_V1190_MICRO_INDEX, cvt_write_reg(), FALSE, cvt_V1190_data::m_common_data, and TRUE. Referenced by cvt_V1190_get_system_info(), cvt_V1190_set_channel_enable(), cvt_V1190_set_continuous_acquisition_mode(), cvt_V1190_set_head_trail_disable(), cvt_V1190_set_head_trail_enable(), cvt_V1190_set_trigger_match(), cvt_V1190_set_trigger_matching_acquisition_mode(), cvt_V1190_set_windows_offset(), and cvt_V1190_set_windows_width(). |